參數(shù)資料
型號(hào)： COP87L88RGV-XE
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-Bit One-Time Programmable (OTP) Microcontroller with 32 Kbytes of Program Memory
中文描述： 8-BIT, OTPROM, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁(yè)數(shù)： 4/34頁(yè)
文件大?。?/td> 385K
代理商： COP87L88RGV-XE
Absolute Maximum Ratings
(Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V
CC
)
Voltage at Any Pin
7V
b
0.3V to V
CC
a
0.3V
Total Current into V
CC
Pin (Source)
100 mA
Total Current out of GND Pin (Sink)
110 mA
Storage Temperature Range
b
65
§
C to
a
140
§
C
Note:Absolute maximum ratings indicate limits beyond which damage to the
device may occur. DC and AC electrical specifications are not ensured when
operating the device at absolute maximum ratings.
DC Electrical Characteristics
b
40
§
C
s
T
A
s
a
85
§
C unless otherwise specified
Parameter
Conditions
Min
Typ
Max
Units
Operating Voltage
2.7
5.5
V
Power Supply Ripple (Note 1)
Peak-to-Peak
0.1 V
CC
V
Supply Current (Note 2)
CKI
e
10 MHz
CKI
e
4 MHz
V
CC
e
5.5V, t
c
e
1
m
s
V
CC
e
4.0V, t
c
e
2.5
m
s
V
CC
e
5.5V, CKI
e
0 MHz
V
CC
e
5.5V, t
c
e
1
m
s
V
CC
e
4.0V, t
c
e
10
m
s
16.5
6.5
mA
mA
HALT Current (Note 3)
12
m
A
IDLE Current, CKI
e
10 MHz
CKI
e
1 MHz
3.5
0.7
mA
mA
Input Levels
RESET
Logic High
Logic Low
CKI (External and Crystal Osc. Modes)
Logic High
Logic Low
All Other Inputs
Logic High
Logic Low
0.8 V
CC
0.2 V
CC
V
0.7 V
CC
0.2 V
CC
0.7 V
CC
0.2 V
CC
a
2
Hi-Z Input Leakage
V
CC
e
5.5V
V
CC
e
5.5V
b
2
m
A
Input Pullup Current
40
250
m
A
G and L Port Input Hysteresis
0.05 V
CC
0.35 V
CC
V
Output Current Levels
D Outputs
Source
Sink (Note 4)
All Others
Source (Weak Pull-Up Mode)
Source (Push-Pull Mode)
Sink (Push-Pull Mode)
V
CC
e
4.5V, V
OH
e
3.3V
V
CC
e
4.5V, V
OL
e
1V
0.4
10
mA
mA
V
CC
e
4.5V, V
OH
e
2.7V
V
CC
e
4.5V, V
OH
e
3.3V
V
CC
e
4.5V, V
OL
e
0.4V
V
CC
e
5.5V
10
0.4
1.6
100
m
A
mA
mA
TRI-STATE Leakage
b
2
a
2
m
A
Allowable Sink/Source
Current per Pin
D Outputs (Sink)
All others
mA
15
3
Maximum Input Current
without Latchup (Note 5)
T
A
e
25
§
C
g
100
mA
RAM Retention Voltage, V
r
500 ns Rise
and Fall Time (Min)
2
V
Input Capacitance
7
pF
Load Capacitance on D2
1000
pF
Note 1:
Rate of voltage change must be less then 0.5V/ms.
Note 2:
Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 3:
The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations by bringing CKI high. Test conditions: All inputs tied to V
CC
, L and G
ports in the TRI-STATE mode and tied to ground, all outputs low and tied to ground. The clock monitor is disabled.
Note 4:
The user must guarantee that D2 pin does not source more than 10 mA during RESET. If D2 sources more than 10 mA during RESET, the device will go
into programming mode.
Note 5:
Pins G5 and RESET are designed with a high voltage input network for factory testing. These pins allow input voltages greater than V
CC
and the pins will
have sink current to V
CC
when biased at voltages greater than V
CC
(the pins do not have source current when biased at a voltage below V
CC
). The effective
resistance to V
CC
is 750
X
(typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V.
http://www.national.com
4
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