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參數(shù)資料
| 型號： | COP404C |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | COP404C ROMless CMOS Microcontrollers |
| 中文描述： | COP404C無ROM的CMOS微控制器 |
| 文件頁數(shù)： | 8/18頁 |
| 文件大?。?/td> | 345K |
| 代理商： | COP404C |
Functional Description
(Continued)
chip will stop as soon as CKI is high and CKOH output will
stay high to keep the chip stopped if the external driver
returns to high impedance state.
Once in the HALT mode, the internal circuitry does not re-
ceive any clock signal and is therefore frozen in the exact
state it was in when halted. All information is retained until
continuing.
The chip may be awakened by one of two different meth-
ods:
D Continue function: by forcing CKOH low, the system
clock will be re-enabled and the circuit will continue to
operate from the point where it was stopped. CKOH
will stay low.
D Restart: by forcing the RESET pin low (see Initializa-
tion)
The HALT mode is the minimum power dissipation state.
Note: if the user has selected dual-clock (DUAL pin tied to
Ground) AND is forcing an external clock on D0 pin
AND the COP404C is running from the D0 clock, the
HALT mode - either hardware or software - will NOT
be entered. Thus, the user should switch to the CKI
clock to HALT. Alternatively, the user may stop the D0
clock to minimize power.
Oscillator Options
There are two basic clock oscillator configurations available
as shown by Figure 9.
D CKI oscillator: CKI is configured as a LSTTL compati-
ble input external clock signal. The external frequency
is divided by 4 to give the instruction cycle time.
D Dual oscillator. By tying DUAL pin to Ground, pin D0 is
now a single pin RC controlled Schmitt trigger oscilla-
tor input. The user may software select between the
D0 oscillator (the instruction cycle time equals the D0
oscillation frequency divided by 4) by setting the D0
latch high or the CKI oscillator by resetting D0 latch
low.
Note that even in dual clock mode, the counter, if used
as a time-base counter, is always connected to the CKI
oscillator.
For example, the user may connect up to a 1 MHz RC
circuit to D0 for faster processing and a 32 kHz exter-
nal clock to CKI for minimum current drain and time
keeping.
Note: CTMA instruction is not allowed when the chip is run-
ning from D0 clock.
Figures 10a and 10b show the timer and clock diagrams
with and without Dual-Clock.
TL/DD/5530–9
Cycle
Time
4
b
9
m
s
8
b
16
m
s
16
b
32
m
s
R
C
V
CC
t
4.5V
t
4.5V
2.4
b
4.5V
15k
30k
60k
Note:
15k
s
R
s
150k
50 pF
s
C
s
150 pF
FIGURE 9. Dual-Oscillator Component Values
82 pF
82 pF
100 pF
TL/DD/5530–10
FIGURE 8. HALT Mode
8
相關PDF資料 |
PDF描述 |
|---|---|
| COP404LSN-5 | COP404LSN-5 ROMLESS N-CHANNEL MICROCONTROLLERS |
| COP404CN | COP404C ROMless CMOS Microcontrollers |
| COP410C | Single-Chip CMOS Microcontrollers |
| COP411C | Single-Chip CMOS Microcontrollers |
| COP310C | Single-Chip CMOS Microcontrollers |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| COP404CN | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:COP404C ROMless CMOS Microcontrollers |
| COP404LSN-5 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:COP404LSN-5 ROMLESS N-CHANNEL MICROCONTROLLERS |
| COP404N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Bit Microcontroller |
| COP410C | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Single-Chip CMOS Microcontrollers |
| COP410C-XXX/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Bit Microcontroller |
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