- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379829 > CDB4382A (Cirrus Logic, Inc.) 114 dB, 192 kHz 8-channel D/A Converter PDF資料下載
參數(shù)資料
| 型號： | CDB4382A |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | 114 dB, 192 kHz 8-channel D/A Converter |
| 中文描述： | 114分貝192千赫8通道D / A轉(zhuǎn)換 |
| 文件頁數(shù)： | 32/47頁 |
| 文件大?。?/td> | 685K |
| 代理商： | CDB4382A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁當(dāng)前第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
32
DS618PP1
CS4382A
5. REGISTER DESCRIPTION
Note:
All registers are read/write in I
2
C mode and write only in SPI, unless otherwise noted.
5.1
Mode Control 1 (address 01h)
5.1.1
Control Port Enable (CPEN)
Default = 0
0 - Disabled
1 - Enabled
Function:
This bit defaults to 0, allowing the device to power-up in Stand-Alone mode. The Control port mode can be
accessed by setting this bit to 1. This will allow the operation of the device to be controlled by the registers
and the pin definitions will conform to Control Port Mode. To accomplish a clean power-up, the user should
write this bit within 10 ms following the release of Reset.
5.1.2
Freeze Controls (Freeze)
Default = 0
0 - Disabled
1 - Enabled
Function:
This function allows modifications to be made to the registers without the changes taking effect until the
FREEZE is disabled. To make multiple changes in the Control port registers take effect simultaneously, en-
able the FREEZE Bit, make all register changes, then Disable the FREEZE bit.
5.1.3
Master Clock DIVIDE ENABLE (mclkdiv)
Default = 0
0 - Disabled
1 - Enabled
Function:
The MCLKDIV bit enables a circuit which divides the externally applied MCLK signal by 2 prior to all other
internal circuitry.
5.1.4
DAC Pair Disable (DACx_DIS)
Default = 0
0 - Enabled
1 - Disabled
Function:
When enabled the respective DAC channel pair
x
(AOUTAx and AOUTBx) will remain in a reset state. It is
advised that changes to these bits be made while the power down bit is enabled to eliminate the possibility
of audible artifacts.
7
6
5
4
3
2
1
0
CPEN
0
FREEZE
0
MCLKDIV
0
DAC4_DIS
0
DAC3_DIS
0
DAC2_DIS
0
DAC1_DIS
0
PDN
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CDB4382 | 114 dB, 192 kHz 8-Channel D/A Converter |
| CDB4383 | RES 1K-OHM 1% 0.10W 50PPM MET-FILM AXIAL BULK MIL-R-10509 |
| CDB4384 | 103 dB, 192 kHz 8-Channel D/A Converter |
| CDB4385 | 114 dB, 192kHz 8-CHANNEL D/A CONVERTER |
| CDB4390 | RESISTOR-1K, 1/10W, 1% MFILM, RN55C |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDB4383 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:114 dB, 192 kHz 8-Channel D/A Converter |
| CDB4384 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 8-Ch DAC w/DSD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB4385 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 8-Ch DAC w/DSD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB4390 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, Stereo D/A Converter for Digital Audio |
| CDB4391 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, 192 kHz Stereo DAC with Volume Control |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。