- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379829 > CDB4382A (Cirrus Logic, Inc.) 114 dB, 192 kHz 8-channel D/A Converter PDF資料下載
參數(shù)資料
| 型號： | CDB4382A |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | 114 dB, 192 kHz 8-channel D/A Converter |
| 中文描述： | 114分貝192千赫8通道D / A轉(zhuǎn)換 |
| 文件頁數(shù)： | 29/47頁 |
| 文件大?。?/td> | 685K |
| 代理商： | CDB4382A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁當(dāng)前第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
DS618PP1
29
CS4382A
3.14.2.2
I
2
C Read
To read from the device, follow the procedure below while adhering to the control port Switching Spec-
ifications.
1.
Initiate a START condition to the I
2
C bus followed by the address byte. The upper 6 bits must be
001100. The seventh bit must match the setting of the AD0 pin, and the eighth must be 1. The eighth
bit of the address byte is the R/W bit.
2.
After transmitting an acknowledge (ACK), the device will then transmit the contents of the register
pointed to by the MAP. The MAP register will contain the address of the last register written to the MAP,
or the default address (see section 3.14.1) if an I
2
C read is the first operation performed on the device.
3.
Once the device has transmitted the contents of the register pointed to by the MAP, issue an ACK.
4.
If the INCR bit is set to 1, the device will continue to transmit the contents of successive registers.
Continue providing a clock and issue an ACK after each byte until all the desired registers are read, then
initiate a STOP condition to the bus.
5.
If the INCR bit is set to 0 and further I
2
C reads from other registers are desired, it is necessary to
initiate a repeated START condition and follow the procedure detailed from steps 1 and 2 from the I
2
C
Write instructions followed by step 1 of the I
2
C Read section. If no further reads from other registers are
desired, initiate a STOP condition to the bus.
SDA
SCL
001100
ADDR
AD0
R/W
Start
ACK
DATA
1-8
ACK
DATA
1-8
ACK
Stop
Note: If operation is a write, this byte contains the Memory Address Pointer, MAP.
Figure 17. Control Port Timing, I
2
C Mode
Note 1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CDB4382 | 114 dB, 192 kHz 8-Channel D/A Converter |
| CDB4383 | RES 1K-OHM 1% 0.10W 50PPM MET-FILM AXIAL BULK MIL-R-10509 |
| CDB4384 | 103 dB, 192 kHz 8-Channel D/A Converter |
| CDB4385 | 114 dB, 192kHz 8-CHANNEL D/A CONVERTER |
| CDB4390 | RESISTOR-1K, 1/10W, 1% MFILM, RN55C |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDB4383 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:114 dB, 192 kHz 8-Channel D/A Converter |
| CDB4384 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 8-Ch DAC w/DSD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB4385 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 8-Ch DAC w/DSD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB4390 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, Stereo D/A Converter for Digital Audio |
| CDB4391 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, 192 kHz Stereo DAC with Volume Control |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。