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參數(shù)資料
| 型號： | BXM80526B700128 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, 700 MHz, MICROPROCESSOR, CPGA495 |
| 封裝： | MICRO, PGA2-495 |
| 文件頁數(shù)： | 70/74頁 |
| 文件大小： | 870K |
| 代理商： | BXM80526B700128 |
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Mobile Intel Celeron Processor (0.18) in BGA2 and Micro-PGA2 Packages
at 700MHz, 650 MHz, 600 MHz, 550 MHz, 500 MHz, 450 MHz,
Low-voltage 500 MHz, and Low-voltage 400A MHz
Datasheet
Order#-XXX
65
Figure 25. PLL Filter Specifications
0 dB
-28 dB
-34 dB
0.2 dB
forbidden
zone
x dB
forbidden
zone
1 MHz
66 MHz
fcore
fpeak
1 Hz
DC
passband
high frequency
band
x = 20.log[(Vcct-60 mV)/ Vcct]
NOTES:
1. Diagram is not to scale
2. No specification for frequencies beyond fcore.
3. Fpeak, if existent, should be less than 0.05 MHz.
A.3
Recommendation for Mobile Systems
The following LC components are recommended. The tables will be updated as other suitable
components and specifications are identified.
Table 41. PLL Filter Inductor Recommendations
Inductor
Part Number
Value
Tol
SRF
Rated
I
DCR
Min Damping R
needed
L1
TDK MLF2012A4R7KT
4.7
H 10% 35 MHz 30 mA 0.56
(1
max)
0
L2
Murata LQG21N4R7K10 4.7
H 10% 47 MHz 30 mA 0.7 (+/-
50%)
0
L3
Murata LQG21C4R7N00 4.7
H 30% 35 MHz 30 mA 0.3 max
0.2
(assumed)
NOTE:
Minimum damping resistance is calculated from 0.35
– DCR
min. From vendor provided data, L1 and L2 DCRmin is
0.4
and 0.5 respectively, qualifying them for zero required trace resistance. DCR
min for L3 is not known and is
assumed to be 0.15
. There may be other vendors who might provide parts of equivalent characteristics and the
OEMs should consider doing their own testing for selecting their own vendors.
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