參數(shù)資料
型號(hào)： BXM80526B700128
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： 64-BIT, 700 MHz, MICROPROCESSOR, CPGA495
封裝： MICRO, PGA2-495
文件頁(yè)數(shù)： 17/74頁(yè)
文件大?。?/td> 870K
代理商： BXM80526B700128
Mobile Intel Celeron Processor (0.18) in BGA2 and Micro-PGA2 Packages
at 700MHz, 650 MHz, 600 MHz, 550 MHz, 500 MHz, 450 MHz,
Low-voltage 500 MHz, and Low-voltage 400A MHz
Datasheet
Order#-XXX
17
Table 12. Clock, APIC, TAP, CMOS, and Open-drain Signal Group DC Specifications
TJ = 0°C to 100°C; VCC = 1.35V ±100 mV or 1.60V ±115 mV; VCCT = 1.50V ±115 mV
Symbol Parameter
Min
Max
Unit Notes
VIL15
Input Low Voltage, 1.5V CMOS
–0.15
VCMOSREFmin –
200 mV
V
VIL25
Input Low Voltage, 2.5V CMOS
–0.3
0.7
V
Notes 1, 2
VIL33
Input Low Voltage, 3.3V CMOS
–0.15
VCMOSREFmin –
200 mV
V
Note 7
VIL,BCLK
Input Low Voltage, BCLK
–0.3
0.5
V
Note 2
VIH15
Input High Voltage, 1.5V CMOS
VCMOSREFmax +
200 mV
VCCT
V
VIH25
Input High Voltage, 2.5V CMOS
2.0
2.625
V
Notes 1, 2
VIH33
Input High Voltage, 3.3V CMOS
VCMOSREFmax +
200 mV
3.465
V
Note 7
VIH,BCLK
Input High Voltage, BCLK
2.0
2.625
V
Note 2
VOL
Output Low Voltage
0.4
V
Note 3
VOH15
Output High Voltage, 1.5V CMOS
N/A
1.615
V
All outputs are Open-
drain
VOH25
Output High Voltage, 2.5V CMOS
N/A
2.625
V
All outputs are Open-
drain
VOH,VID
Output High Voltage, VID ball/pins
N/A
5.50
V
5V + 10%
VCMOSREF CMOSREF Voltage
0.90
1.10
V
Note 4
VCLKREF
CLKREF Voltage
1.175
1.325
V
1.25V ±6%, Note 4
IOL
Output Low Current
10
mA
Note 6
IL
Leakage Current for Inputs,
Outputs and I/Os
±100
A
Notes 5,8
NOTES:
1.
Parameter applies to the PICCLK and PWRGOOD signals only.
2.
VILx,min and VIHx,max only apply when BCLK and PICCLK are stopped. BCLK and PICCLK should be stopped in the
low state. See Table 22 for the BCLK voltage range specifications for when BCLK is running. See Table 23 for the
PICCLK voltage range specifications for when PICCLK is running.
3.
Parameter measured at 10 mA.
4.
VCMOSREF and VCLKREF should be created from a stable voltage supply using a voltage divider.
5.
(0
≤ VIN/OUT ≤ VIHx,max).
6.
Specified as the minimum amount of current that the output buffer must be able to sink. However, VOL,max cannot be
guaranteed if this specification is exceeded.
7.
Parameter applies to BSEL[1:0] signals only.
8.
For BSEL[1:0] signals, IL,Max can be upto 100
A (with1K pull-up to1.5V) and upto 500 A (with 1K pull-up to 3.3V).
3.6
AC Specifications
3.6.1
System Bus, Clock, APIC, TAP, CMOS, and Open-drain AC
Specifications
Table 13 through Table 21 provide AC specifications associated with the mobile Celeron
processor. The AC specifications are divided into the following categories: Table 13 contains the
system bus clock specifications; Table 14 contains the processor core frequencies;
相關(guān)PDF資料
PDF描述
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