參數(shù)資料
型號(hào): BT261KPJ
元件分類: TVS-瞬態(tài)抑制二極管
英文描述: Transient Voltage Suppressor Diodes
中文描述: 視頻信號(hào)發(fā)生器
文件頁(yè)數(shù): 10/56頁(yè)
文件大?。?/td> 387K
代理商: BT261KPJ
Bt261
30 MHz Pixel Clock Monolithic CMOS HSYNC Line Lock Controller
Brooktree
4
C
Video Input / Sync Detector
IRCUIT
D
ESCRIPTION
L261_H
Video Input / Sync Detector
Either an AC-coupled video signal or a DC-coupled TTL-compatible composite
sync signal may be input via the VIDEO input pin (negative-going sync polarity).
When AC coupled, the clamping circuitry attempts to force the VIDEO pin voltage
during sync tips to VCC/2.
Command register_0 specifies the threshold above the sync tip to use for sync
detection. If the sync tip on VIDEO is below the selected threshold, composite
sync information is detected and output onto CSYNC* with no pipeline delay and
asynchronous to the pixel clock.
Typically, the VIDEO input will be connected to the TTL-compatible CSYNC*
output of the Bt252/254 Image Digitizer, and the highest sync slicing level will be
selected.
$0D
CLAMP start high register
$0E
CLAMP stop low register
$0F
CLAMP stop high register
$10
ZERO start low register
$11
ZERO start high register
$12
ZERO stop low register
$13
ZERO stop high register
$14
FIELD gate start low register
$15
FIELD gate start high register
$16
FIELD gate stop low register
$17
FIELD gate stop high register
$18
noise gate start low register
$19
noise gate start high register
$1A
noise gate stop low register
$1B
noise gate stop high register
$1C
HCOUNT low register
$1D
HCOUNT high register
$1E
reserved
$1F
reserved
Table 1. Internal Register Addressing
ADDRO - ADDR4
Addressed by MPU
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