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參數(shù)資料
| 型號(hào)： | ASM5I961CG-32-ET |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | Low Voltage Zero Delay Buffer |
| 中文描述： | 961 SERIES, PLL BASED CLOCK DRIVER, 17 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | GREEN, TQFP-32 |
| 文件頁數(shù)： | 4/15頁 |
| 文件大?。?/td> | 685K |
| 代理商： | ASM5I961CG-32-ET |
July 2005
rev 0.2
Table 5: AC CHARACTERISTICS
(V
CC
= 3.3V ± 5%, T
A
= 40°C to +85°C)
1
Symbol
Characteristic
ASM5I961C
Low Voltage Zero Delay Buffer
4 of
15
Notice: The information in this document is subject to change without notice.
Min
Typ
Max
Unit
Condition
f
ref
Input Frequency
F_RANGE = 0
F_RANGE = 1
F_RANGE = 0
F_RANGE = 1
100
50
100
50
25
200
100
200
100
75
3.0
MHz
f
max
Maximum Output
Frequency
Reference Input Duty Cycle
TCLK Input Rise/Fall Time
Propagation Delay
(static phase offset)
Output–to–Output Skew
2
MHz
f
refDC
t
r
, t
f
%
nS
0.8 to 2.0V
t
(
)
CCLK to FB_IN
–80
120
pS
PLL locked
t
sk(O)
90
50
50
7.0
150
55
55
1.0
10
10
15
10
15
10
pS
DC
O
Output Duty Cycle
F_RANGE = 0
F_RANGE = 1
42
45
0.1
%
t
r
, t
f
t
PLZ
,
HZ
t
PZL,LZ
t
JIT(CC)
t
JIT(PER)
t
JIT(
)
t
lock
Note: 1. AC characteristics apply for parallel output termination of 50
to V
TT
.
2. See applications section for part–to–part skew calculation
3. See applications section for calculation for other confidence factors than 1
σ
Output Rise/Fall Time
Output Disable Time
Output Enable Time
Cycle–to–Cycle Jitter
Period Jitter
I/O Phase Jitter
Maximum PLL Lock Time
nS
nS
nS
pS
pS
nS
mS
0.55 to 2.4V
RMS (1
σ
)
3
RMS (1
σ
)
RMS (1
σ
)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ASM5I961CG-32-LT | Low Voltage Zero Delay Buffer |
| ASM5I961C | Low Voltage Zero Delay Buffer |
| ASM5I961C-32-ET | Low Voltage Zero Delay Buffer |
| ASM5I961C-32-LT | Low Voltage Zero Delay Buffer |
| ASM5I961PG-32LR | Low Voltage Zero Delay Buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ASM5I961CG-32-LT | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Voltage Zero Delay Buffer |
| ASM5I961P | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Voltage Zero Delay Buffer |
| ASM5I961P-32LR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Voltage Zero Delay Buffer |
| ASM5I961PG-32LR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Voltage Zero Delay Buffer |
| ASM5I9653A | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 1:8 LVCMOS PLL Clock Generator |
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