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參數(shù)資料
| 型號： | AS82527 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SERIAL COMMUNICATIONS CONTROLLER CONTROLLER AREA NETWORK PROTOCOL |
| 中文描述： | 2 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁數(shù)： | 9/22頁 |
| 文件大?。?/td> | 239K |
| 代理商： | AS82527 |
82527
A.C. Characteristics for 8/16-Bit Multiplexed Intel Modes (Modes 0, 1)
Conditions: V
CC
e
5V
g
10%, V
SS
e
0V, T
A
e b
40
§
C to
a
125
§
C, C
L
e
100 pF (Continued)
Symbol
Parameter
Min
Max
Conditions
t
WHDV
WR
Y
High to Output Data Valid
on Port 1/2
t
MCLK
2 t
MCLK
a
500 ns
t
COPO
CLKOUT Period
(CD
V
a
1)
*
t
OSC(3)
t
CHCL
CLKOUT High Period
(CD
V
a
1)
*
(/2
t
OSC
b
10 (CD
V
a
1)
*
(/2
t
OSC
a
15
NOTES:
References to WR
Y
also pertain to WRH
Y
.
1. Definition of ‘‘read cycle without a previous write’’: The time between the rising edge of WR
Y
/WRH
Y
(for the previous
write cycle) and the falling edge of RD
Y
(for the current read cycle) is greater than 2 t
MCLK
.
2. Definition of ‘‘write cycle with a previous write’’: The time between the rising edge of WR
Y
/WRH
Y
(for the previous write
cycle) and the rising edge of WR
Y
/WRH
Y
(for the current write cycle) is less than 2 t
MCLK
.
3. Definition of CD
V
is the value loaded in the CLKOUT register representing the CLKOUT divisor.
A.C. Characteristics for 8/16-Bit Multiplexed Intel Modes (Modes 0, 1)
272250–3
9
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