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| 型號： | AND8090D |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | AC Characteristics of ECL Devices |
| 中文描述： | 交流特性的ECL裝置 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大小： | 896K |
| 代理商： | AND8090D |
AND8090/D
http://onsemi.com
5
SIGNAL LEVELS
AC HIGH and LOW Levels
The HIGH level referred
to in this application note corresponds to the IEEE “topline,”
and the LOW level corresponds to the IEEE “baseline” as
shown in Figure 5. The 50% point lies halfway between the
HIGH and LOW levels. Refer to IEEE Standard 1941977
for further voltage level information.
Figure 5. HIGH and LOW Waveform Definition
HIGH
(topline)
LOW
(baseline)
50%
V
IH
/V
OH
V
IL
/V
OL
Input Levels
Operational differential input levels are
specified by V
PP
and the V
IHCMR
range as described in the
“Differential
Characteristics”
singleended input levels are specified by V
IL
and V
IH
as
described in the “SingleEnded Characteristics” section.
section.
Operational
Output Levels
Output signals may be differential or
singleended. AC characteristics for ON Semiconductor
devices with ECL outputs are typically measured for an
output termination of 50 to V
TT
(the termination voltage
equal to V
CC
2.0 V). HIGH and LOW output levels range
between the boundary and threshold values for the
respective HIGH and LOW input levels specified on data
sheets. Output logic levels are shown in Figure 6.
V
OHmax
HIGH
V
OHmin
V
OLmax
LOW
V
OLmin
Boundary
Threshold
Threshold
Boundary
Figure 6. Output Logic Levels
Oscilloscope Averaging
Digital sampling oscilloscopes
use an algorithm to determine the average level over a pulse
width to establish the HIGH and LOW levels. An example is
shown in Figure 7. The horizontal cursors at the HIGH and
LOW levels indicate the determined average levels.
Figure 7. HIGH and LOW Waveform Levels
HIGH
LOW
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