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參數(shù)資料
| 型號： | AND8090D |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | AC Characteristics of ECL Devices |
| 中文描述： | 交流特性的ECL裝置 |
| 文件頁數(shù)： | 18/20頁 |
| 文件大?。?/td> | 896K |
| 代理商： | AND8090D |
AND8090/D
http://onsemi.com
18
Test Equipment DJ Test Setup
The general test setup shown in Figure 42 is used to
measure the test equipment peaktopeak deterministic
jitter.
The NBSG14 test equipment deterministic jitter eye
diagram in Figure 43 was created by the identical pattern
generator and oscilloscope setup that was used to generate
the total deterministic jitter eye diagram. The test equipment
deterministic jitter represented by the histogram at the upper
right of the eye diagram is 10.88 ps pp.
Test Equipment Jitter (DJ)
Pattern Generator (DJ)
Oscilloscope (DJ)
Figure 42. Test Equipment Deterministic Jitter Test
PRBS
Trigger
Pattern Generator
Oscilloscope
DJ (PP)
Figure 43. Test Equipment Deterministic Jitter Eye Diagram
DUT DJ Calculation
The DUT peaktopeak deterministic jitter is determined
with the following equation.
DUT (DJ)
Total Jitter (DJ)
Test Equipment Jitter (DJ)
The DUT peaktopeak deterministic jitter for the above
NBSG14 example is calculated below.
DUT (DJ)
18.00 ps
10.88 ps
7.12 ps pp
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