
AN701
Vishay Siliconix
www.vishay.com
2
Document Number: 70575
16-Jan-01
The Si9114A controller is similar in configuration to the Si9110.
It uses a traditional constant frequency current mode control,
the most commonly used architecture. The duty cycle is limited
to less than 50% to avoid problems with core reset.
Current mode control is presently the de-facto standard for
PWM control circuits. Indeed, it is the only candidate that
should be considered, given its many advantages:
Cycle by cycle current limit protection
Simple loop compensation, eliminating effect of output
inductor
Excellent fast transient response due to inner control loop
Automatic input voltage feed-forward compensation
All switchmode power supplies face a start-up problem caused
by the large difference between dc bus voltage and the V
CC
power rail for supplying the control circuit. The traditional
technique has been to keep the control circuit in
“
sleep mode,
”
while a small amount of energy is used to
“
top up
”
a large
enough electrolytic capacitor to get the circuit started. When
the circuit starts operating, a winding on the transformer is then
used to power the control circuit. Disadvantages with this type
of circuit include delayed start-up and large required
capacitances for guaranteed operation over the full voltage
range. The Si9114A overcomes these problems by using low
power consumption, BiC/DMOS circuitry, and a unique
high-voltage depletion mode MOSFET. (See 2)
When power is first applied, the depletion transistor is on, and
current flows from the input capacitor C
IN
into the V
CC
capacitor C
VCC
until V
CC
reaches 9.2 V. The converter
transformer will then supply the V
CC
through a bias winding,
which will raise V
CC
to a level higher than 9.2 V. Ideally this will
be between 11 and 13 V, thus turning off the high-voltage
depletion mode MOSFET. The 9.2-V threshold has a
hysteresis of 300 mV to prevent oscillations when the
transition voltage is not clearly defined or when high-line
supply impedance is encountered.
For applications where the input dc voltage is not high, and the
chip power consumption is not excessive, the feedback
winding can be eliminated. In such cases, the pre-regulator
circuit will behave just like a linear regulator with 9.2-V output
and 10-k series resistance. In this case, the parameters to be
considered are the dropout voltage at lowest line condition and
the power dissipation at highest voltage. The high-voltage
depletion mode MOSFET contains an internal body diode, and
in situations where the V
CC
is being powered from a laboratory
supply, care must be taken to avoid loading the +V
IN
rail
beyond the current rating of this device. Typically, the reverse
characteristics of the device will generate a voltage of 3.4 V on
Pin 1 with 10-k load when powering V
CC
from a lab supply.
In some applications it is necessary to inhibit the start of a
converter until a high enough voltage is present on the supply
bus. This is the case for the following reasons:
Circuitry fed from a high line impedance such as a
telephone line will have difficulty starting, since the
converter will behave like a negative impedance. As the dc
voltage decreases, the input current increases because
constant power is drawn. This causes severe oscillations,
and can in some instances have a destructive effect on the
converter. [4]
During start-up, the Si9114A will begin operation as soon
as the UVLO threshold is reached. Since the converter is
designed to operate over a much higher range
—
for
example, from 36 to 72 V
—
then between 10- and 36-V
input the output voltage will be out of regulation and
undefined. In some cases, digital circuitry will not accept
this mode of operation, and system faults will be
encountered without a RESET watchdog circuit.
To overcome these problems, a Zener diode of suitable value
V
Z
can be placed in series with the +V
in
pin, preventing start-up
until V
Z
+ 9.2 V is reached.
Figure 2
Start Circuit
+
–
+
–
Transformer Winding
V
CC
To Internal Circuits
+V
IN
–
V
IN
9.2 V
0.2 V
300 mV
UVLO
C
IN
C
VCC