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參數(shù)資料
| 型號： | AN32502A |
| 英文描述： | For Information·Communication - PDA |
| 中文描述： | 信息·通訊-掌上電腦 |
| 文件頁數(shù)： | 45/45頁 |
| 文件大?。?/td> | 574K |
| 代理商： | AN32502A |
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45
SDF00034AEB
AN32502A
Publication data: November 2002
60
3
Level
shift
VDD1
PO to P4
Change VB1 to VDD1
Internal
logic
LGND
Pin 40 to pin 44
10. Analog switch (VO1, VO2)
8
9
10
Control
logic
DC voltage regulator
input
DC output 1
DC output 2
I
2
C
Application Notes (continued)
9
.
General purpose (GPO0 to GP05)
Figure 10
1
Figure 9
1
This IC is equipped with 5-system general purpose output pins.
Figure 9
1 shows circuit configuration. The output is CMOS mode.
Initial setting at startup is low for every outputs and high/ low settings are carried out by I
2
C control.
DC characteristics of output MOSFET become
U
output voltage 0.3 V at 1 mA.
It is able to applied for on/off switch of external circuits or for driving LED. But care should be taken to voltage loss by the
above-mentioned DC resistance of output MOSFET for actual application.
1) Power supply and GND
Power supply voltage of this regulator is pin 60 (VDD1) and GND is for pin 3 (LGND).
Internal logic block preceding level shift is VB1 and SGND.
This IC built-in an analog switch of 1 input 2 outputs. This is pin 9 for input and pin 8 and pin 10 for outputs. Figure 1 shows
circuit configuration. The MOS size between pin 8 and pin 9 is same as the one between pin 9 and pin 10.
P-channel MOSFET is connected between pin 8 and pin 9 and between pin 9 and pin 10. It is used as switch by logic control of
gate. Suppose you have to supply the same stabilized supply voltage to both A and B circuit blocks. You can use this analog
switch to halt B block to save the power while A block is operating.
Initial setting at power on turns off for both and on/off setting is able to done by I
2
C control.
DC resistance of switching MOS is about 1
.
Care should be taken to this influence for current and load fluctuation.
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