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參數資料
| 型號： | AN32502A |
| 英文描述： | For Information·Communication - PDA |
| 中文描述： | 信息·通訊-掌上電腦 |
| 文件頁數： | 35/45頁 |
| 文件大?。?/td> | 574K |
| 代理商： | AN32502A |
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35
SDF00034AEB
AN32502A
Publication data: November 2002
HO1 output
LO1 output
80 nsec
80 nsec
On
Off
Off
Off
Off
Off
Off
Off
On
On
On
On
On
On
Off
td
td
Figure 6
2
Application Notes (continued)
6
.
Explanation of operation (continued)
Ch.1 (continued)
3) Output voltage
Output voltage from HO1 and LO1 is applied with a dead time of 80 nsec so that simultaneous on of Q11 and 12 may not
cause a through-current to flow. Refer to figure 2 for timing.
4) Error amplifier
Error amplifier response characteristics are determined by the feedback C11 and R13 the built-in R103 between pin 34 and pin 35.
R13: 10 k
C11: 0.01
μ
F
It is recommended to above
In actual pattern layout, it is recommended to make C11 and R13 lines as short as possible so as to reduce effect by noise.
5) On/off control
Ch.1 can be controlled only by pin 54.
Control by serial data is unavailable.
6) Power supply and GND
Power is supplied from pin 32 (VB2) only for the output drive stage and from pin 46 (VB1) for other parts. GND is connected
for pin 29 (PGND1) only for the output drive stage. Other parts are connected to the signal system GND of pin 6 (SGND).
Connect Q12 source, D11 anode, C13GND with thick wires as near to pin 29 as possible.
7) Peripheral parts
The characteristics of output capacitor C13 has an effect on output transient response characteristics.
It is recommended to use a high ESR capacitor like our SPCAP.
It is also recommended to select the constant of 10
μ
H for inductor L1 in the supply voltage range of this IC (2.8 V to 5.8 V)
considering efficiency degradation caused by size and DC resistance.
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