
37
SDF00034AEB
AN32502A
Publication data: November 2002
Ch.2 is a linear regulator. Figure 6
5 shows the ch.2 internal block configuration.
It runs a feedback control comparing the internal V
REF
with pin 25 voltage. Output voltage is determined by the following
equation.
Vout
=
Internal V
REF
is set to 1.0 V.
Ch.2 is intended to be used in the memory circuit and is automatically switched to the backup power supply circuit when supply
voltage is lowered. (When VB1 gets below 3.1 V, ch.2 off, Q22 off and the backup power supply circuit on.)
Q22 functions as a switch that would prevent current from reverse-flowing from output to source when switching to a backup
power supply circuit.
When power supply voltage (VB1) is equal to or less than 3.1 V, gate control signal becomes “High” and Q22 gate voltage
becomes equal to backup for supply voltage.
VBO (3.1 V to 3.3 V) and is switched off. Simultaneously, a backup power supply circuit is actuated to keep output voltage to the
constant level.
This switching response time is determined by Q22 gate capacitance and R201.
Output voltage is likely to drop at the switching time depending on the main power supply off conditions. In this case, connect a
resistor of 500 k
between pins 24 and pin 50 so that R201 resistance can be kept small equivalently and response time is able to
kept short.
1) Rush current at power supply input
This regulator built-in a circuit limiting rush current at power supply input. Insertion of a capacitor between pin 11 (PR2)
and GND allows to control rush current to approx. 500 mA. (At supply voltage: 5.8 V, C22
=
33
μ
F)
2) On/off control
This regulator is able to on/off control with a serial data and pin 55.
R22
R21+R22
×
V
REF
Gate
control
27
24
26
25
V
REF
11
28
VB3
RGC2
LC2
PGND2
FBR2
PR2
50
1M
VBO
R
R
R
R
C
C
Q21
Q22
Figure 6
5
Application Notes (continued)
6
.
Explanation of operation (continued)
Ch.2