參數(shù)資料
型號: AN1218
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: HC05 to HC08 Optimization
中文描述: 以HC08的優(yōu)化HC05
文件頁數(shù): 48/56頁
文件大?。?/td> 417K
代理商: AN1218
Application Note
AN1218 Rev. 2
48
***** DBNZA - decrement acca and branch if not zero
* HC05 code *
* A is predefined at $06
LPE NOP ; used here to represent any
; number of instructions
DECA ;3,1 (A) = (A) - 1
BNE LPE ;3,2 if (A) not zero, then LPE
* HC08 code *
* A is predefined at $06
LP5 NOP ; used here to represent any
; number of instructions
DBNZA LP5 ;3,2 (A) = (A) - 1
; if (A) not zero, then LP5
* Total CPU05 cycles, bytes = 6,3
* Total CPU08 cycles, bytes = 3,2
***** DBNZX - decrement x and branch if not zero
* HC05 code *
* Index register X is predefined at $04
LPF NOP ; used here to represent any
; number of instructions
DECX ;3,1 (X) = (X) - 1
BNE LPF ;3,2 if (X) not zero, then LPF
* HC08 code *
* Index register X is predefined at $04
LP6 NOP ; used here to represent any
; number of instructions
DBNZX LP6 ;3,2 (X) = (X) - 1
; if (X) not zero, then LP6
* Total CPU05 cycles, bytes = 6,3
* Total CPU08 cycles, bytes = 3,2
DONE NOP
BRA DONE
***** Initialize the reset vector
ORG $FFFE
DW LPA
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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