參數(shù)資料
型號: AN1218
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: HC05 to HC08 Optimization
中文描述: 以HC08的優(yōu)化HC05
文件頁數(shù): 23/56頁
文件大小: 417K
代理商: AN1218
Application Note
New Branch Instructions
AN1218 Rev. 2
23
an 8-bit offset is added to the effective
address of the operand.
CBEQA
Compare and Branch if Equal
(A) - (M); PC
(PC) + $0003 + Rel if result
is $00
Operation:
Description: CBEQA compares an immediate operand in
memory with the accumulator and causes a
branch if the result is zero. This instruction
combines CMP and BEQ for faster table
look-up routines.
CBEQX
Compare and Branch if Equal
(IX) - (M); PC
(PC) + $0003 + Rel if result
is $00
Operation:
Description: CBEQX compares an immediate operand in
memory with the lower order index register
X and causes a branch if the result is zero.
This instruction combines CPX and BEQ for
faster loop counter control.
DBNZ
Decrement and Branch if Not Zero
M
(M) - $01;
PC
(PC) + $0003 + Rel, if result _ $00 for Direct, IX1,
and SP1
PC
(PC) + $0002 + Rel, if result _ $00 for IX
Description: DBNZ subtracts one from the operand M in
memory and causes a branch if the result is
not zero. This instruction combines DEC
and BNE for faster loop counter control.
Operation:
DBNZA
Decrement and Branch if Not Zero
A
(A) - $01; PC
(PC) + $0002 + Rel, if
result _ $00
Operation:
Description: DBNZA subtracts one from the accumulator
and causes a branch if the result is not zero.
This instruction combines DECA and BNE
for faster loop counter control.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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