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參數(shù)資料
| 型號： | AN1218 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | HC05 to HC08 Optimization |
| 中文描述： | 以HC08的優(yōu)化HC05 |
| 文件頁數(shù)： | 3/56頁 |
| 文件大?。?/td> | 417K |
| 代理商： | AN1218 |
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Application Note
CPU05/CPU08 Programmer's Model Comparison
AN1218 Rev. 2
3
Fast 8-bit multiply and integer/fractional divide instructions
Binary coded decimal (BCD) instruction enhancements
Internal bus flexibility to accommodate CPU enhancing
peripherals such as a DMA controller
Fully static low voltage/low power design
CPU05/CPU08 Programmer's Model Comparison
The CPU05 and the CPU08 programmer's model differences are
illustrated in
Figure 1
.
H Index Register
The index register of the CPU08 has been extended to 16 bits, allowing
the user to index or address a 64 KByte memory space without any
offset. The upperbyte of the index registeriscalledthe H index register.
The concatenated 16-bit register is called the H:X register. Source code
written for CPU05 will not affect the H register and it will remain in its
reset state of $00. There are seven new instructions that allow the user
to manipulate the H:X index register. These instructions are covered in
detail later.
Stack Pointer
The stack pointer (SP) has been extended from its 6-bit CPU05 version
to a full 16-bit SP on the CPU08. SPH:SPL refers to the 16-bit stack
pointer by naming the high byte, SPH, and the low byte, SPL. To
maintain HC05 compatibility, the reset state is $00FF.
New instructions and new addressing modes greatly increase the utility
of the CPU08 stack pointer over the CPU05 stack pointer. Nine new
CPU08 instructions allow the user to easily manipulate the SP and the
stack.
CPU08 also has relative addressing modes that allow the SP to be used
as an index register to access temporary variables on the stack. These
addressing modes and new instructions are discussed later in this
application note.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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