Application Note
AN1218 Rev. 2
10
Index Registers
CPU08 has the additional H index register which is the high byte
extension to the X index register. Together, the two index registers
formulate the concatenated 16-bit H:X index register. Five new
instructions are introduced on the CPU08 to allow manipulation of the
H:X index register. Source code written for the HC05 will not effect the
H register and it will remain in its reset state of $00.
The TSX and the TXS instructions also utilize the H:X index register.
These instructions are covered in more detail in the stack pointer
section.
Five New Indexing
Instructions, Detail
The new CPU08 instructions that affect the index registers are listed
below. Examplesfortheseinstructionsaregivenin
Appendix A — New
CPU08 Indexing Instruction Examples
.
AIX
Add Immediate to Index Register
X
←
(H:X) + (M)
Description: AIX adds an immediate value to the 16-bit
index register formed by the concatenation
of the H and X registers. The immediate
operand is an 8-bit two's complement
signed offset. Prior to addition to H:X, the
offset is sign extended to 16 bits.
Operation:
CLRH
Clear Index High
Operation:
H
←
$00
Description: The contents of H are replaced with zeros.
CPHX
Compare 16-bit Index Register
Operation:
(H:X) – (M:M+1)
Description: CPHX compares the 16-bit index register
H:X with the 16-bit value in memory and
sets the condition code register accordingly.
F
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