參數(shù)資料
型號(hào)： AN1218
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： HC05 to HC08 Optimization
中文描述： 以HC08的優(yōu)化HC05
文件頁數(shù)： 22/56頁
文件大小： 417K
代理商： AN1218
Application Note
AN1218 Rev. 2
22
New Branch Instructions
Description
Six new unsigned branch instructions were added to the instruction set
of the CPU08 to improve looping and table searching capabilities.
These instructions are CBEQ, CBEQA, CBEQX, DBNZ, DBNZA, and
DBNZX. The CBEQ instructions combine the compare (CMP and CPX)
instructions and the branch if equal (BEQ) instruction . The DBNZ
instructions combine the decrement (DEC, DECA, and DECX)
instructions and the branch if not equal (BNE) instruction. These new
instructions improve cycle time and decrease code space. More detail
is given below on each instruction.
Six New Branch
Instructions, Detail
All the new CPU08 instructions that affect branching are listed below.
Examples for these instructions are given in
Appendix G — New
Branch Instruction Examples
. The examples in
Appendix G — New
Branch Instruction Examples
also compare the CPU05 and the
CPU08 bus cycles and memory requirements for the algorithm to
execute the branch.
CBEQ
Compare and Branch if Equal
A) - (M); PC
←
(PC) + $0003 + Rel if result
is $00
Operation:
For IX+ mode: (A) - (M);
PC
←
(PC) + $0002 + Rel, if result is $00
Description: CBEQ compares the operand from memory
with the accumulator and causes a branch if
the result is zero. This function combines
CMP and BEQ for faster table look-up
routines.
The addressing mode CBEQ_IX+ compares
the operand addressed by the 16-bit index
register H:X to the accumulator and causes
a branch if the result is zero. The 16-bit
index register is then incremented
regardless of whether a branch is taken.
CBEQ_IX1+ operates the same way except
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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