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參數(shù)資料
| 型號： | AM79C960KCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnetTM-ISA Single-Chip Ethernet Controller |
| 中文描述： | 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP120 |
| 封裝： | PLASTIC, QFP-120 |
| 文件頁數(shù)： | 81/127頁 |
| 文件大?。?/td> | 814K |
| 代理商： | AM79C960KCW |
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P R E L I M I N A R Y
AMD
1-423
Am79C960
the PCnet-ISA controller. There
are no minimum buffer size re-
strictions. Zero length buffers are
allowed for protocols which re-
quire it.
TMD3
Bit
Name
Description
15
BUFF
BUFFER ERROR is set by the
PCnet-ISA
controller
transmission
PCnet-ISA controller does not
find the ENP flag in the current
buffer and does not own the next
buffer. This can occur in either of
two ways:
1)
The OWN bit of the next
buffer is zero.
2) FIFO underflow occurred
before the PCnet-ISA
controller obtained the
next STATUS byte
(TMD1[15:8]).
BUFF error will turn off the trans-
mitter (CSR0, TXON = 0). If a
Buffer Error occurs, an Under-
flow Error will also occur. BUFF is
not valid when LCOL or RTRY er-
ror is set during transmit data
chaining. BUFF is written by the
PCnet-ISA controller.
UNDERFLOW ERROR indi-
cates that the transmitter has
truncated a message due to data
late from memory. UFLO indi-
cates that the FIFO has emptied
before the end of the frame was
reached. Upon UFLO error, the
transmitter is turned off (CSR0,
TXON = 0). UFLO is written by
the PCnet-ISA controller.
RESERVED bit. The PCnet-ISA
controller will write this bit with a
“0”.
during
the
when
14
UFLO
13
RES
12
LCOL
LATE COLLISION indicates that
a collision has occurred after the
slot time of the channel has
elapsed. The PCnet-ISA control-
ler does not re-try on late
collisions. LCOL is written by the
PCnet-ISA controller.
LOSS OF CARRIER is set when
the carrier is lost during an
PCnet-ISA
controller-initiated
transmission. The PCnet-ISA
controller does not stop trans-
mission upon loss of carrier. It will
continue to transmit the whole
frame until done. LCAR is written
by the PCnet-ISA controller.
RETRY ERROR indicates that
the transmitter has failed after 16
attempts to successfully transmit
a message, due to repeated colli-
sions on the medium. If DRTY = 1
in the MODE register, RTRY will
set after one failed transmission
attempt. RTRY is written by the
PCnet-ISA controller.
TIME
DOMAIN
TOMETRY reflects the state of
an internal PCnet-ISA controller
counter that counts at a 10 MHz
rate from the start of a transmis-
sion to the occurrence of a
collision or loss of carrier. This
value is useful in determining the
approximate distance to a cable
fault. The TDR value is written by
the PCnet-ISA controller and is
valid only if RTRY is set.
Note that 10 MHz gives very low
resolution and in general has not
been found to be particularly use-
ful. This feature is here primarily
to maintain full compatibility with
the LANCE.
11
LCAR
10
RTRY
09-00
TDR
REFLEC-
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相關代理商/技術參數(shù) |
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| AM79C961 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am79C961 - PCnet-ISA+ Jumperless Single-Chip Ethernet Controller for ISA |
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