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參數(shù)資料
| 型號： | AM79C960KCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnetTM-ISA Single-Chip Ethernet Controller |
| 中文描述： | 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP120 |
| 封裝： | PLASTIC, QFP-120 |
| 文件頁數(shù)： | 77/127頁 |
| 文件大小： | 814K |
| 代理商： | AM79C960KCW |
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P R E L I M I N A R Y
AMD
1-419
Am79C960
Initialization Block
The figure below shows the Initialization Block memory
configuration. Note that the Initialization Block must be
based on a word (16-bit) boundary.
Bits
15–12
Bits
11–8
Bits
7–4
Bits
3–0
Address
IADR+22
TLEN
RES
TDRA 23–16
IADR+20
TDRA 15–00
IADR+18
RLEN
RES
RDRA 23–16
IADR+16
RDRA 15–00
IADR+14
LADRF 63–48
IADR+12
LADRF 47–32
IADR+10
LADRF 31–16
IADR+08
LADRF 15–00
IADR+06
PADR 47–32
IADR+04
PADR 31–16
IADR+02
PADR 15–00
IADR+00
MODE 15–00
RLEN and TLEN
The TLEN and RLEN fields in the initialization block are
3 bits wide, occupying bits 15,14, and 13, and the value
in these fields determines the number of Transmit and
Receive Descriptor Ring Entries (DRE) which are used
in the descriptor rings. Their meaning is as follows:
R/TLEN
# of DREs
000
1
001
2
010
4
011
8
100
16
101
32
110
64
111
128
If a value other than those listed in the above table is de-
sired, CSR76 and CSR78 can be written after
initialization is complete. See the description of the ap-
propriate CSRs.
RDRA and TDRA
TDRA and RDRA indicate where the transmit and re-
ceive descriptor rings, respectively, begin. Each DRE
must be located on an 8-byte boundary.
LADRF
The Logical Address Filter (LADRF) is a 64-bit mask that
is used to accept incoming Logical Addresses. If the first
bit in the incoming address (as transmitted on the wire)
is a “1”, the address is deemed logical. If the first bit is a
“0”, it is a physical address and is compared against the
physical address that was loaded through the initializa-
tion block.
A logical address is passed through the CRC generator,
producing a 32-bit result. The high order 6 bits of the
CRC are used to select one of the 64 bit positions in the
Logical Address Filter. If the selected filter bit is set, the
address is accepted and the frame is placed into
memory.
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