參數(shù)資料
型號： AM79C930VCW
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： PCnet-Mobile Single-Chip Wireless LAN Media Access Controller
中文描述： 2 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQFP144
封裝： TQFP-144
文件頁數(shù)： 41/161頁
文件大?。?/td> 691K
代理商： AM79C930VCW
P R E L I M I N A R Y
AMD
41
Am79C930
some functionality is only available in PCMCIA mode.
Pin functionality is programmed according to the follow-
ing table:
Note that a read of the ANTSLTD bit (TCR7[1]) will al-
ways give the current
ANTSLT
/LA23 pin value without
inversion, regardless of pin configuration setting.
ANTSLT
/
LA23 Pin
Direction
I
O
ANTSLT
/
LA23 Pin
Value
NA
ANTSLT
PCMCIA
Pin Value
0
1
ANTSEN
TIR26[3]
X
0
ANSLTLFN
TCR30[7]
X
0
ANTSLTLEN
TCR15[7]
X
X
(LA23 input function)
(from internal antenna)
(diversity circuit)
1
1
1
X
X
1
1
1
0
0
1
X
I
NA
O
O
TCR7[1]
TIR26
[
4
] (write)
TIR26
[
5
] (read)
Pin 142: TXCMD/LA21
The TXCMD/LA21 pin may be configured to operate as
input or output and may be configured to drive a trans-
ceiver control reference signal using one of two timing
sources plus input from the TXCMD bit of TIR11
(TIR11[0]). Note that some functionality is only available
in PCMCIA mode.
Pin functionality is programmed according to the
following table.
Transmit state machine generated signals
T1
,
T2
,
T3
,
TXP_ON and O_TX have the timing indicated in the
diagram in section Am79C930-Based TX Power
Ramp Control.
Note that a read of the TXCMDT bit (TCR7[2]) will al-
ways give the current TXCMD/LA21 pin value without
inversion, regardless of pin configuration setting.
TXCMD/
LA21 Pin
Direction
I
O
O
I
O
TXCMD/
LA21 Pin
Value
NA
O_TX
TIR11[0] + T1
NA
TCR7[2]
PCMCIA
Pin Value
0
1
1
1
1
RCEN
TIR11[3]
X
0
1
1
1
TXCMFN
TCR30[5]
X
X
0
1
1
TXCMEN
TCR15[5]
X
X
X
0
1
(LA21 input function)
Pin 143:
TXDATA
/LA20
The
TXDATA
/LA20 pin may be configured to operate as
input or output and may be configured to drive inverted
transmit data. Note that some functionality is only
available in PCMCIA mode. Pin functionality is pro-
grammed according to the following table:
The
TXDATA
signal is the inverse of the TXDATA signal
which is the TX data drawn from the TX FIFO using the
internal TX state machine control.
Note that a read of the TXDATALD bit (TCR7[0]) will al-
ways give the current
TXDATA
/LA20 pin value without
inversion, regardless of pin configuration setting.
TXDATA
/
LA20 Pin
Direction
I
O
TXDATA
/
LA20 Pin
Value
NA
TXDATA
PCMCIA
Pin Value
0
1
TXDLFN
TCR30[6]
X
0
TXDLEN
TCR15[6]
X
X
(LA20 input function)
(from internal TX FIFO
using internal TX state machine timing)
1
1
1
1
0
1
I
NA
O
TCR7[0]
Pin 144: LLOCKE/SA15
The LLOCKE/SA15 pin may be configured to operate as
input or output. Note that some functionality is only avail-
able in PCMCIA mode. Pin functionality is programmed
according to the following table:
Note that a read of the LLOCKE bit (TIR11[4]) will al-
ways give the current LLOCKE/SA15 pin value without
inversion, regardless of pin configuration setting.
相關PDF資料
PDF描述
AM79C940VCW Media Access Controller for Ethernet (MACE)
AM79C940 Media Access Controller for Ethernet (MACE)
AM79C940JCW Media Access Controller for Ethernet (MACE)
AM79C940KCW Media Access Controller for Ethernet (MACE)
AM79C960 PCnetTM-ISA Single-Chip Ethernet Controller
相關代理商/技術參數(shù)
參數(shù)描述
AM79C940 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE)
AM79C940_00 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE⑩)
AM79C940-16/25 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
AM79C940-16JC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller
AM79C940-25JC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*