
SPRS550C
– OCTOBER 2009 – REVISED MARCH 2011
3
ELECTRICAL CHARACTERISTICS
3.1
Absolute Maximum Ratings
The following table specifies the absolute maximum ratings over the operating junction temperature range
of commercial and extended temperature devices. Stresses beyond those listed under absolute maximum
ratings may cause permanent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions beyond those indicated under recommended
operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods
may affect device reliability.
Notes:
Logic functions and parameter values are not assured out of the range specified in the recommended
operating conditions.
Table 3-1. Absolute Maximum Ratings Over Operating Junction Temperature Range
PARAMETER
MIN
MAX
UNIT
VDD_CORE
Supply voltage range for core macros
-0.5
1.6
V
VDDS
Second supply voltage range for 1.8-V I/O macros
-0.5
2.25
V
VDDSHV
Supply voltage range for 1.8/3.3V I/O macros
-0.5
3.8
V
VDDS_SRAM_MPU
Analog Supply voltage range for 1.8-V MPU SLDO
-0.5
2.25
V
VDDS_SRAM_CORE_BG
Analog Supply voltage range for 1.8-V Core SLDO and
-0.5
2.25
V
VDDA of BandGap
VDDS_DPLL_MPU_USB
Analog power supply for 1.8-V MPUSS DPLL and
-0.5
2.1
V
HOST
USBHOST DPLL
VDDS_DPLL_PER_COR
Analog power supply for 1.8-V DPLL and HSDIVIDER/
-0.5
2.1
V
E
CORE and HSDIVIDER
VDDA_DAC
Analog Power Supply for 1.8-V DAC
-0.5
2.43
V
VDDA3P3V_USBPHY
Analog power supply for 3.3-V USB transceiver
-0.5
3.6
V
VDDA1P8V_USBPHY
Power Supply for 1.8-V USB transceiver
-0.5
2.0
V
VDDSOSC
Power Supply for 1.8-V oscillator
-0.5
2.1
V
VPAD
Voltage range at
Oscillator input (sys_xtalin)
-0.3
VDDSOSC + 0.3
V
PAD
VDDS 1.8-V I/O macros
-0.3
VDDS + 0.3
Dual-voltage LVCMOS inputs,
-0.3
VDDSHV + 0.3
VDDSHV = 1.8 V
Dual-voltage LVCMOS inputs,
-0.3
3.8
VDDSHV = 3.3 V
USB VBUS pin (usb0_vbus)
5.5
USB 5V Tolerant IOs (usb0_dp,
5.25
usb0_dm, usb0_id)
VESD
ESD stress
HBM (human body model)(2)
>1000
V
voltage(1)
CDM (charged device model)(3)
>500
IIOI
Current-pulse injection on each I/O pin(4)
200
mA
Iclamp
Clamp current for an input or output
-20
20
mA
Tstg
Storage temperature range
-65
150
°C
(1)
Electrostatic discharge (ESD) to measure device sensitivity/immunity to damage caused by electrostatic discharges into the device.
(2)
The level listed above is the passing level per ANSI/ESDA/JEDEC JS-001-2010. JEDEC document JEP155 states that 500V HBM
allows safe manufacturing with a standard ESD control process, and manufacturing with less than 500V HBM is possible if necessary
precautions are taken. Actual performance of the device may exceed the value listed above.
(3)
The level listed above is the passing level per EIA-JEDEC JESD22-C101E. JEDEC document JEP157 states that 250V CDM allows
safe manufacturing with a standard ESD control process. Actual performance of the device may exceed the value listed above.
(4)
Each device is tested with I/O pin injection of 200 mA with a stress voltage of 1.5 times maximum vdd at room temperature.
80
ELECTRICAL CHARACTERISTICS
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2009–2011, Texas Instruments Incorporated