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參數(shù)資料
| 型號(hào)： | AM30LV0064DJ40WGIT |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | PROM |
| 英文描述： | 64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only Flash Memory with UltraNAND Technology |
| 中文描述： | 8M X 8 FLASH 3V PROM, 35 ns, PBGA40 |
| 封裝： | 8 X 15 MM, 0.80 MM PITCH, FBGA-40 |
| 文件頁(yè)數(shù)： | 29/41頁(yè) |
| 文件大小： | 1067K |
| 代理商： | AM30LV0064DJ40WGIT |
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Am30LV0064D
29
AC CHARACTERISTICS
Mode Selection
Notes:
1. SE# must be asserted during read mode command input during “Read Spare Area” (50h) CLE cycle.
2. The “RESET” (FFh) or “Read Status” (70h) command may be written to the device during busy (RY/BY# is logic low).
KEY TO SWITCHING WAVEFORMS
ALE
CLE
WE#
CE#
RE#
SE#
WP#
RY/BY#
Mode
L
H
L
H
L/X (Note 1)
X
H
Read Mode
Command Input
H
L
L
H
X
X
H
Address Input
L
H
L
H
X
H
L/H (Note 2)
Write Mode
Command Input
H
L
L
H
X
H
H
Address Input
L
L
L
H
L/H
H
H
Data Input
L
L
H
L
L/H
X
H
Sequential Read and Data
Output
L
L
H
L
H
L/H
X
L
During Read (Busy)
X
X
X
X
X
L/H
H
L
During Program (Busy)
X
X
X
X
X
X
H
L
During Erase (Busy)
X
X
X
X
X
X
L
X
Write Protect
X
X
X
H
X
X
X
X
Standby
WAVEFORM
INPUTS
OUTPUTS
Steady
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted
Changing, State Unknown
Does Not Apply
Center Line is High Impedance State (High Z)
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