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參數(shù)資料
| 型號： | AM30LV0064DJ40WGIT |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | PROM |
| 英文描述： | 64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only Flash Memory with UltraNAND Technology |
| 中文描述： | 8M X 8 FLASH 3V PROM, 35 ns, PBGA40 |
| 封裝： | 8 X 15 MM, 0.80 MM PITCH, FBGA-40 |
| 文件頁數(shù)： | 11/41頁 |
| 文件大?。?/td> | 1067K |
| 代理商： | AM30LV0064DJ40WGIT |
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Am30LV0064D
11
CELL LAYOUT AND ADDRESS ASSIGNMENT
Note:
Device programming is executed on a page basis while erase is performed on a block basis. During read operations, data
is transferred from the Flash array to the internal Data Register on a page basis. Data is then sequentially read from the Data
Register on a Byte basis.
Figure 1. Mass Storage Device Cell Layout
Table 1. Address Assignment
Legend:
Axx = specific address bit, X = don’t care (V
IH
or V
IL
)
Notes:
1. A8 is automatically set “Low” or “High” by the 00h or 01h command.
2. A22 to A13 specifies the Block Address, A12 to A9 specifies the Page Address within a block, and A7 to A0 identifies the
byte address within half a page.
I/O 7
A7
A16
X
I/O 6
A6
A15
X
I/O 5
A5
A14
A22
I/O 4
A4
A13
A21
I/O 3
A3
A12
A20
I/O 2
A2
A11
A19
I/O 1
A1
A10
A18
I/O 0
A0
A9
A17
First Cycle
Second Cycle
Third Cycle
256
16
16,384 Pages
(1,024 Blocks)
Flash Memory
Array
512 + 16 Byte
Data Register
I/O 7
I/O 0
~
16 Pages
(1 Block)
528 Bytes
(1 Page)
256
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