參數(shù)資料
型號: AM30LV0064DJ40WGIT
廠商: ADVANCED MICRO DEVICES INC
元件分類: PROM
英文描述: 64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only Flash Memory with UltraNAND Technology
中文描述: 8M X 8 FLASH 3V PROM, 35 ns, PBGA40
封裝: 8 X 15 MM, 0.80 MM PITCH, FBGA-40
文件頁數(shù): 27/41頁
文件大?。?/td> 1067K
代理商: AM30LV0064DJ40WGIT
Am30LV0064D
27
DC CHARACTERISTICS
TEST CONDITIONS
Table 6. Test Specifications
Figure 15. Test Setup
Parameter
Description
Test Conditions
Min
Typ
Max
Unit
I
CC1
Sequential Read Current
t
CYCLE
=50 ns, CE#=V
IL
,
I
OUT
=0 mA
10
20
mA
I
CC2
Command, Address Input
Current
t
CYCLE
=50 ns, CE#=V
IL
10
20
mA
I
CC3
I
CC4
I
CC5
I
SB1
Data Input Current
10
20
mA
Program Current
10
20
mA
Erase Current
10
20
mA
Standby Current (TTL)
CE#=V
IH
CE#=V
CC
–0.2 V,
WP#= SE# = 0V/V
CC
1
mA
I
SB2
Standby Current (CMOS)
10
50
μ
A
I
LI
I
LO
Input Leakage Current
V
IN
= 0 V to 3.6 V
V
OUT
= 0 V to 3.6 V
All I/O Pins
10
μ
A
μ
A
Output Leakage Current
10
V
IH
Input High Voltage
2.0
V
CCQ
+ 0.3
V
All Except I/O Pins
2.0
V
CC
+ 0.3
0.8
V
V
IL
V
OH
Input Low Voltage, All Inputs
–0.3
V
Output High Voltage
I
OH
= –400 μA, V
CC
= V
CCQ
V
CC
– 0.3
V
V
OL
Output Low Voltage
I
OL
=2.1 mA, V
CC
= V
CCQ
V
OL
=0.4 V
0.4
V
I
OL
(RY/BY#)
Output Low Current (RY/BY#)
8
10
mA
Test Conditions
V
CC
=
3.0 V
± 10%
V
CC
=
3.3 V
± 10%
Unit
Output Load
1 TTL Gate
Output Load Capacitance, C
L
(including jig capacitance)
50
100
pF
Input Rise and Fall Times
5
ns
Input Pulse Levels
0.0 – 2.4
V
Input Timing Measurement
Reference Levels
1.5
V
Output Timing Measurement
Reference Levels
1.5
V
CL
Device
Under Test
6.2 K
2.7 K
3.3 V
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