- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11206 > ADUC7060BSTZ32-RL (Analog Devices Inc)IC ARM7 MCU FLASH 32K 48LQFP PDF資料下載
參數(shù)資料
| 型號： | ADUC7060BSTZ32-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 97/108頁 |
| 文件大小： | 0K |
| 描述： | IC ARM7 MCU FLASH 32K 48LQFP |
| 產(chǎn)品變化通告： | ADuC7060/1 Idd Specification Change 01/Feb/2010 |
| 設(shè)計資源： | 4 mA-to-20 mA Loop-Powered Temperature Monitor Using ADuC7060/1 (CN0145) Low power, Long Range, ISM Wireless Measuring Node (CN0164) |
| 標準包裝： | 2,000 |
| 系列： | MicroConverter® ADuC7xxx |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 10MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | POR，PWM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 14 |
| 程序存儲器容量： | 32KB（16K x 16） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 1K x 32 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.375 V ~ 2.625 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 5x24b，8x24b，D/A 1x14b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 48-LQFP |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁當前第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁
Data Sheet
ADuC7060/ADuC7061
Rev. D | Page 89 of 108
I2C Master Status, I2CMSTA, Register
Name:
I2CMSTA
Address:
0xFFFF0904
Default value:
0x0000
Access:
Read only
Function:
This 16-bit MMR is the I2C status register in master mode.
Table 98. I2CMSTA MMR Bit Designations
Bit
Name
Description
15:11
Reserved. These bits are reserved.
10
I2CBBUSY
I2C bus busy status bit.
This bit is set to 1 when a start condition is detected on the I2C bus.
This bit is cleared when a stop condition is detected on the bus.
9
I2CMRxFO
Master receive FIFO overflow.
This bit is set to 1 when a byte is written to the receive FIFO when it is already full.
This bit is cleared in all other conditions.
8
I2CMTC
I2C transmission complete status bit.
This bit is set to 1 when a transmission is complete between the master and the slave with which it was
communicating. If the I2CMCENI bit in I2CMCON is set, an interrupt is generated when this bit is set.
Clear this interrupt source.
7
I2CMNA
I2C master no acknowledge data bit
This bit is set to 1 when a no acknowledge condition is received by the master in response to a data write transfer. If
the I2CNACKENI bit in I2CMCON is set, an interrupt is generated when this bit is set.
This bit is cleared in all other conditions.
6
I2CMBUSY
I2C master busy status bit.
Set to 1 when the master is busy processing a transaction.
Cleared if the master is ready or if another master device has control of the bus.
5
I2CAL
I2C arbitration lost status bit.
This bit is set to 1 when the I2C master does not gain control of the I2C bus. If the I2CALENI bit in I2CMCON is set, an
interrupt is generated when this bit is set.
This bit is cleared in all other conditions.
4
I2CMNA
I2C master no acknowledge address bit.
This bit is set to 1 when a no acknowledge condition is received by the master in response to an address. If the
I2CNACKENI bit in I2CMCON is set, an interrupt is generated when this bit is set.
This bit is cleared in all other conditions.
3
I2CMRXQ
I2C master receive request bit.
This bit is set to 1 when data enters the receive FIFO. If the I2CMRENI in I2CMCON is set, an interrupt is generated.
This bit is cleared in all other conditions.
2
I2CMTXQ
I2C master transmit request bit.
This bit goes high if the transmit FIFO is empty or contains only one byte and the master has transmitted an address
+ write. If the I2CMTENI bit in I2CMCON is set, an interrupt is generated when this bit is set.
This bit is cleared in all other conditions.
1:0
I2CMTFSTA
I2C master transmit FIFO status bits.
[00] = I2C master transmit FIFO empty.
[01] = 1 byte in master transmit FIFO.
[10] = 1 byte in master transmit FIFO.
[11] = I2C master transmit FIFO full.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV3202ASWZ | IC CROSSPOINT SWIT 32X16 176LQFP |
| AD7506SQ | IC MULTIPLEXER 16X1 28CDIP |
| VI-B3T-IW-F2 | CONVERTER MOD DC/DC 6.5V 100W |
| VI-B3V-IX-F4 | CONVERTER MOD DC/DC 5.8V 75W |
| VI-B3V-IX-F3 | CONVERTER MOD DC/DC 5.8V 75W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADUC7061BCPZ32 | 功能描述:IC MCU 16/32BIT 32KB 32LFCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC7xxx 標準包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設(shè)備:欠壓檢測/復(fù)位，LED，POR，PWM，WDT 輸入/輸出數(shù):16 程序存儲器容量:4KB（4K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱:269-4116Z8F0413SH005EG-ND |
| ADUC7061BCPZ32-RL | 功能描述:IC MCU 16/32BIT 32KB 32LFCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC7xxx 標準包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設(shè)備:欠壓檢測/復(fù)位，LED，POR，PWM，WDT 輸入/輸出數(shù):16 程序存儲器容量:4KB（4K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱:269-4116Z8F0413SH005EG-ND |
| ADUC70SMARTLINKRL7 | 制造商:Analog Devices 功能描述: |
| ADUC70TEL | 制造商:Analog Devices 功能描述:FLASH ARM +5-CH 12BIT ADC - Trays |
| ADUC70TEL-RL7 | 制造商:Analog Devices 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。