SLAS631A – APRIL 2009 – REVISED" />
參數(shù)資料
型號： ADS62C17IRGCT
廠商： Texas Instruments
文件頁數(shù)： 39/68頁
文件大?。?/td> 0K
描述： IC ADC 11BIT DUAL 200MSPS 64VQFN
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 11
采樣率（每秒）： 200M
數(shù)據(jù)接口： 串行，并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 1.1W
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 64-VQFN 裸露焊盤（9x9）
包裝： 標(biāo)準(zhǔn)包裝
輸入數(shù)目和類型： 2 個(gè)差分，單極
產(chǎn)品目錄頁面： 888 (CN2011-ZH PDF)
其它名稱： 296-24232-6
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f-Frequency-MHz
Resistance-k
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SLAS631A – APRIL 2009 – REVISED JULY 2009 ............................................................................................................................................................. www.ti.com
Glitches are caused by the opening & closing of the sampling switches. The driving circuit should present a low
source impedance to absorb these glitches. Otherwise, this could limit performance, mainly at low input
frequencies (up to about 200 MHz). It is also necessary to present low impedance (< 50
) for the common
mode switching currents. This can be achieved by using two resistors from each input terminated to the common
mode voltage (VCM).
The device includes an internal R-C filter from each input to ground. The purpose of this filter is to absorb the
sampling glitches inside the device itself. The cut-off frequency of the R-C filter involves a trade-off.
A lower cut-off frequency (larger C) absorbs glitches better, but it reduces the input bandwidth. On the other
hand, with a higher cut-off frequency (smaller C), bandwidth support is maximized. But now, the sampling
glitches need to be supplied by the external drive circuit. This has limitations due to the presence of the package
bond-wire inductance.
In ADS62C17, the R-C component values have been optimized while supporting high input bandwidth (up to 700
MHz). However, in applications with input frequencies up to 200-300MHz, the filtering of the glitches can be
improved further using an external R-C-R filter (as shown in Figure 46 and Figure 47).
In addition to the above, the drive circuit may have to be designed to provide a low insertion loss over the
desired frequency range and matched impedance to the source. While doing this, the ADC input impedance
must be considered. Figure 44 and Figure 45 show the impedance (Zin = Rin || Cin) looking into the ADC input
pins.
Figure 44. ADC Analog Input Resistance (Rin) Across Frequency
44
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): ADS62C17
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