參數(shù)資料
型號: AD9995KCPZ
廠商: Analog Devices Inc
文件頁數(shù): 23/60頁
文件大?。?/td> 0K
描述: IC CCD SIGNAL PROCESSOR 56-LFCSP
標準包裝: 1
類型: CCD 信號處理器,12 位
輸入類型: 邏輯
輸出類型: 邏輯
接口: 3 線串口
電流 - 電源: 30mA
安裝類型: 表面貼裝
封裝/外殼: 56-VFQFN 裸露焊盤,CSP
供應商設備封裝: 56-LFCSP-VQ(8x8)
包裝: 托盤
–3–
AD9995–SPECIFICATIONS
Parameter
Min
Typ
Max
Unit
TEMPERATURE RANGE
Operating
–20
+85
°C
Storage
–65
+150
°C
POWER SUPPLY VOLTAGE
AVDD (AFE Analog Supply)
2.7
3.0
3.6
V
TCVDD (Timing Core Analog Supply)
2.7
3.0
3.6
V
RGVDD (RG Driver)
2.7
3.0
3.6
V
HVDD (H1–H4 Drivers)
2.7
3.0
3.6
V
DRVDD (Data Output Drivers)
2.7
3.0
3.6
V
DVDD (Digital)
2.7
3.0
3.6
V
POWER DISSIPATION (See TPC 1 for Power Curves)
36 MHz,Typ Supply Levels, 100 pF H1–H4 Loading
360
mW
Power from HVDD Only*
130
mW
Standby 1 Mode
130
mW
Standby 2 Mode
12
mW
Standby 3 Mode
0.5
mW
MAXIMUM CLOCK RATE (CLI)
36
MHz
*The total power dissipated by the HVDD supply may be approximated using the equation
Total HVDD Power
HVDD Number of H outputs used
=
×
[
]
C
HVDD
HVDD Pixel
Pixel Frequency
Frequency
LOAD
=
×
=
×
C
CLOAD
LOAD
××
×
HVDD
H
Reducing the H-loading, using only two of the outputs, and/or using a lower HVDD supply will reduce the power dissipation.
Specifications subject to change without notice.
DIGITAL SPECIFICATIONS
Parameter
Symbol
Min
Typ
Max
Unit
LOGIC INPUTS
High Level Input Voltage
VIH
2.1
V
Low Level Input Voltage
VIL
0.6
V
High Level Input Current
IIH
10
A
Low Level Input Current
IIL
10
A
Input Capacitance
CIN
10
pF
LOGIC OUTPUTS (Except H and RG)
High Level Output Voltage @ IOH = 2 mA
VOH
2.2
V
Low Level Output Voltage @ IOL = 2 mA
OL
VOL
0.5
V
RG and H-DRIVER OUTPUTS (H1–H4)
High Level Output Voltage @ Max Current
VOH
VDD – 0.5
V
Low Level Output Voltage @ Max Current
VOL
0.5
V
Maximum Output Current (Programmable)
30
mA
Maximum Load Capacitance (For Each Output)
100
pF
Specifications subject to change without notice.
REV. 0
OBSOLETE
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