參數(shù)資料
型號(hào): AD9979BCPZRL
廠商: Analog Devices Inc
文件頁數(shù): 48/56頁
文件大?。?/td> 0K
描述: IC PROCESSOR CCD 14BIT 48-LFCSP
標(biāo)準(zhǔn)包裝: 1
類型: CCD 信號(hào)處理器,14 位
輸入類型: 邏輯
輸出類型: 邏輯
接口: 3 線串口
電流 - 電源: 48mA
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: AD9979BCPZRLDKR
AD9979
Rev. C | Page 52 of 56
Address
Data Bit
Content
Default
Value 1
Update
Type
Name
Description
08
[2:0]
X
SCP
HBLKALT_PAT1
HBLK Pattern 1 order. Used during pixel mixing mode.
[5:3]
X
HBLKALT_PAT2
HBLK Pattern 2 order. Used during pixel mixing mode.
[8:6]
X
HBLKALT_PAT3
HBLK Pattern 3 order. Used during pixel mixing mode.
[11:9]
X
HBLKALT_PAT4
HBLK Pattern 4 order. Used during pixel mixing mode.
[14:12]
X
HBLKALT_PAT5
HBLK Pattern 5 order. Used during pixel mixing mode.
[17:15]
X
HBLKALT_PAT6
HBLK Pattern 6 order. Used during pixel mixing mode.
[19:18]
X
HBLKMODE
HBLK mode selection.
0 = normal HBLK.
1 = pixel mixing mode.
2 = special pixel mixing mode.
3 = not used.
[20]
X
TESTMODE
Test operation only. Set to 0.
[27:21]
Unused
Set unused bits to 0.
09
[12:0]
X
SCP
HBLKLEN
HBLK length in HBLK alteration modes.
[20:13]
X
HBLKREP
Number of HBLK repetitions in HBLK alternation modes.
[21]
X
HBLKMASK_H1
Masking polarity for H1/H3 during HBLK.
[22]
X
HBLKMASK_H2
Masking polarity for H2/H4 during HBLK.
[27:23]
Unused
Set unused bits to 0.
0A
[12:0]
X
SCP
HBLKSTART
HBLK start position used in pixel mixing modes.
[25:13]
X
HBLKEND
HBLK end position used in pixel mixing modes.
[27:26]
Unused
Set unused bits to 0.
0B
[27:0]
X
TESTMODE
Test operation only. Set to 0.
0C
[12:0]
X
SCP
CLPOB0_TOG1
CLPOB0 Toggle Position 1.
[25:13]
X
CLPOB0_TOG2
CLPOB0 Toggle Position 2.
[27:26]
Unused
Set unused bits to 0.
0D
[12:0]
X
SCP
CLPOB1_TOG1
CLPOB1 Toggle Position 1.
[25:13]
X
CLPOB1_TOG2
CLPOB1 Toggle Position 2.
[27:26]
Unused
Set unused bits to 0.
0E
[12:0]
X
SCP
PBLK0_TOG1
PBLK0 Toggle Position 1.
[25:13]
X
PBLK0_TOG2
PBLK0 Toggle Position 2.
[27:26]
Unused
Set unused bits to 0.
0F
[12:0]
X
SCP
PBLK1_TOG1
PBLK1 Toggle Position 1.
[25:13]
X
PBLK1_TOG2
PBLK1 Toggle Position 2.
[27:26]
Unused
Set unused bits to 0.
1 X = Don’t care.
Table 34. Field Registers
Address
Data Bit
Content
Default
Value1
Update
Type
Name
Description
00
[12:0]
X
VD
SCP0
Sequence Change Position 0.
[25:13]
X
SCP1
Sequence Change Position 1.
[27:26]
Unused
Set unused bits to 0.
01
[12:0]
X
VD
SCP2
Sequence Change Position 2.
[25:13]
X
SCP3
Sequence Change Position 3.
[27:26]
Unused
Set unused bits to 0.
02
[12:0]
X
VD
SCP4
Sequence Change Position 4.
[25:13]
X
SCP5
Sequence Change Position 5.
[27:26]
Unused
Set unused bits to 0.
03
[12:0]
X
VD
SCP6
Sequence Change Position 6.
[25:13]
X
SCP7
Sequence Change Position 7.
[27:26]
Unused
Set unused bits to 0.
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