參數(shù)資料
型號(hào): AD9979BCPZRL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 47/56頁(yè)
文件大?。?/td> 0K
描述: IC PROCESSOR CCD 14BIT 48-LFCSP
標(biāo)準(zhǔn)包裝: 1
類型: CCD 信號(hào)處理器,14 位
輸入類型: 邏輯
輸出類型: 邏輯
接口: 3 線串口
電流 - 電源: 48mA
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: AD9979BCPZRLDKR
AD9979
Rev. C | Page 51 of 56
Address
Data Bit
Content
Default
Value
Update
Type
Name
Description
67
[15:0]
0000
SCK
TGCORE_UPDT_VD
Enable VD update of timing core registers. Each bit corresponds to
one address location.
TGCORE_UPDT_VD[0] = 1; update Address 0x30 on VD rising edge.
TGCORE_UPDT_VD[1] = 1; update Address 0x31 on VD rising edge.
TGCORE_UPDT_VD[15] = 1; update Address 0x37 on VD rising edge.
[27:16]
Unused
Set unused bits to 0, if accessed.
68 to 72
[27:0]
Unused
Set unused registers to 0, if accessed.
Table 33. HPAT Registers (HPAT Registers Always Start at Address 0x800)
Address
Data Bit
Content
Default
Value 1
Update
Type
Name
Description
00
[12:0]
X
SCP
HBLKTOGO1
First HBLK toggle position for odd lines, or RA0H1REPA/RA0H1REPB/
RA0H1REPC.
[25:13]
X
HBLKTOGO2
Second HBLK toggle position for odd lines, or RA1H1REPA/RA1H1REPB/
RA1H1REPC.
[27:26]
Unused
Set unused bits to 0.
01
[12:0]
X
SCP
HBLKTOGO3
Third HBLK toggle position for odd lines, or RA2H1REPA/RA2H1REPB/
RA2H1REPC.
[25:13]
X
HBLKTOGO4
Fourth HBLK toggle position for odd lines, or RA3H1REPA/RA3H1REPB/
RA3H1REPC.
[27:26]
Unused
Set unused bits to 0.
02
[12:0]
X
SCP
HBLKTOGO5
Fifth HBLK toggle position for odd lines, or RA4H1REPA/RA4H1REPB/
RA4H1REPC.
[25:13]
X
HBLKTOGO6
Sixth HBLK toggle position for odd lines, or RA5H1REPA/RA5H1REPB/
RA5H1REPC.
[27:26]
Unused
Set unused bits to 0.
03
[12:0]
X
SCP
HBLKTOGE1
First HBLK toggle position for even lines, or RA0H2REPA/RA0H2REPB/
RA0H2REPC.
[25:13]
X
HBLKTOGE2
Second HBLK toggle position for even lines, or RA1H2REPA/RA1H2REPB/
RA1H2REPC.
[27:26]
Unused
Set unused bits to 0.
04
[12:0]
X
SCP
HBLKTOGE3
Third HBLK toggle position for even lines, or RA2H2REPA/RA2H2REPB/
RA2H2REPC.
[25:13]
X
HBLKTOGE4
Fourth HBLK toggle position for even lines, or RA3H2REPA/RA3H2REPB/
RA3H2REPC.
[27:26]
Unused
Set unused bits to 0.
05
[12:0]
X
SCP
HBLKTOGE5
Fifth HBLK toggle position for even lines, or RA4H2REPA/RA4H2REPB/
RA4H2REPC.
[25:13]
X
HBLKTOGE6
Sixth HBLK toggle position for even lines, or RA5H2REPA/RA5H2REPB/
RA5H2REPC.
[27:26]
Unused
Set unused bits to 0.
06
[12:0]
X
SCP
HBLKSTARTA
HBLK Repeat Area Start Position A. Used during HBLK Mode 2.
[25:13]
X
HBLKSTARTB
HBLK Repeat Area Start Position B. Used during HBLK Mode 2.
[27:26]
Unused
Set unused bits to 0.
07
[12:0]
X
SCP
HBLKSTARTC
HBLK Repeat Area Start Position C. Used during HBLK Mode 2.
[27:13]
Unused
Set unused bits to 0.
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