參數(shù)資料
型號: AD9912ABCPZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 1/40頁
文件大小: 0K
描述: IC DDS 1GSPS DAC 14BIT 64LFCSP
產(chǎn)品培訓模塊: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
標準包裝: 750
分辨率(位): 14 b
主 fclk: 1GHz
調(diào)節(jié)字寬(位): 48 b
電源電壓: 1.8V, 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 帶卷 (TR)
1 GSPS Direct Digital
Synthesizer with 14-Bit DAC
AD9912
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2007–2010 Analog Devices, Inc. All rights reserved.
FEATURES
1 GSPS internal clock speed (up to 400 MHz output directly)
Integrated 1 GSPS 14-bit DAC
48-bit frequency tuning word with 4 μHz resolution
Differential HSTL comparator
Flexible system clock input accepts either crystal or external
reference clock
On-chip low noise PLL REFCLK multiplier
2 SpurKiller channels
Low jitter clock doubler for frequencies up to 750 MHz
Single-ended CMOS comparator; frequencies of <150 MHz
Programmable output divider for CMOS output
Serial I/O control
Excellent dynamic performance
Software controlled power-down
Available in two 64-lead LFCSP packages
Residual phase noise @ 250 MHz
10 Hz offset: 113 dBc/Hz
1 kHz offset: 133 dBc/Hz
100 kHz offset: 153 dBc/Hz
40 MHz offset: 161 dBc/Hz
APPLICATIONS
Agile LO frequency synthesis
Low jitter, fine tune clock generation
Test and measurement equipment
Wireless base stations and controllers
Secure communications
Fast frequency hopping
GENERAL DESCRIPTION
The AD9912 is a direct digital synthesizer (DDS) that features
an integrated 14-bit digital-to-analog converter (DAC). The
AD9912 features a 48-bit frequency tuning word (FTW) that
can synthesize frequencies in step sizes no larger than 4 μHz.
Absolute frequency accuracy can be achieved by adjusting the
DAC system clock.
The AD9912 also features an integrated system clock phase-
locked loop (PLL) that allows for system clock inputs as low
as 25 MHz.
The AD9912 operates over an industrial temperature range,
spanning 40°C to +85°C.
BASIC BLOCK DIAGRAM
FDBK_IN
DAC_OUT
AD9912
S1 TO S4
OUT
OUT_CMOS
FILTER
SYSTEM CLOCK
MULTIPLIER
SERIAL PORT,
I/O LOGIC
CLOCK
OUTPUT
DRIVERS
DIGITAL
INTERFACE
06
76
3-
0
01
DIRECT
DIGITAL
SYNTHESIS
CORE
STARTUP
CONFIGURATION
LOGIC
Figure 1.
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