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參數(shù)資料
| 型號： | AD9879BSZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PROCESSOR FRONT END 100MQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 12 |
| 通道數(shù)： | 5 |
| 功率（瓦特）： | 587mW |
| 電壓 - 電源，模擬： | 3.3V |
| 電壓 - 電源，數(shù)字： | 3.3V |
| 封裝/外殼： | 100-BQFP |
| 供應(yīng)商設(shè)備封裝： | 100-MQFP（14x20） |
| 包裝： | 托盤 |
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AD9879
Rev. A | Page 25 of 32
DIGITAL-TO-ANALOG CONVERTER
A 12-bit digital-to-analog converter (DAC) is used to convert
the digitally processed waveform into an analog signal. The
worst-case spurious signals due to the DAC are the harmonics
of the fundamental signal and their aliases. The conversion
process produces aliased components of the fundamental signal
at n × fSYSCLK ± fCARRIER (n = 1, 2, 3). These are typically filtered
with an external RLC filter at the DAC output. It is important
for this analog filter to have a sufficiently flat gain and linear
phase response across the bandwidth of interest to avoid
modulation impairments. A relatively inexpensive seventh-
order elliptical low-pass filter is sufficient to suppress the
aliased components for HFC network applications.
The AD9879 provides true and complement current outputs.
The full-scale output current is set by the RSET resistor at Pin 49
and the DAC gain register. Assuming maximum DAC gain, the
value of RSET for a particular full-scale IOUT is determined using
the following equation:
RSET = 32 VDACRSET/IOUT = 39.4/IOUT
(22)
For example, if a full-scale output current of 20 mA is desired,
then RSET = (39.4/0.02) , or approximately 2 k.
The following equation calculates the full-scale output current
including the programmable DAC gain control.
IOUT = [39.4/RSET] × 10(7.5 + 0.5 NGAIN)/20
(23)
where NGAIN is the value of DAC fine gain control [3:0].
The full-scale output current range of the AD9879 is 4 mA to
20 mA. Full-scale output currents outside of this range degrade
SFDR performance. SFDR is also slightly affected by output
matching; the two outputs should be terminated equally for best
SFDR performance. The output load should be located as close
as possible to the AD9879 package to minimize stray capaci-
tance and inductance.
The load can be a simple resistor to ground, an op amp current-
to-voltage converter, or a transformer-coupled circuit. It is best
not to attempt to directly drive highly reactive loads (such as an
LC filter).
Driving an LC filter without a transformer requires the filter to
be doubly terminated for best performance. The filter input and
output should both be resistively terminated with the appro-
priate values. The parallel combination of the two terminations
determines the load the AD9879 sees for signals within the
filter pass band. For example, a 50 terminated input/output
low-pass filter looks like a 25 load to the AD9879. The
output compliance voltage of the AD9879 is 0.5 V to +1.5 V.
To avoid signal distortion, any signal developed at the DAC
output should not exceed +1.5 V. Furthermore, the signal may
extend below ground as much as 0.5 V without damage or
signal distortion.
The AD9879 true and complement outputs can be differentially
combined for common-mode rejection using a broadband 1:1
transformer. Using a grounded center tap results in signals at
the AD9879 DAC output pins that are symmetrical about
ground. As previously mentioned, by differentially combining
the two signals, the user can provide some degree of common-
mode signal rejection. A differential combiner might consist of
a transformer or an operational amplifier. The object is to
combine or amplify only the difference between two signals and
to reject any common, usually undesirable, characteristic, such
as 60 Hz hum or clock feedthrough that is equally present on
both individual signals.
Connecting the AD9879 true and complement outputs to the
differential inputs of the gain programmable cable drivers
AD8321/AD8323 or AD8322/AD8327 provides an optimized
solution for the standard compliant cable modem upstream
channel. The cable driver’s gain can be programmed through a
direct 3-wire interface using the profile registers of the AD9879.
3
LOW-PASS
FILTER
TX
AD832x
AD9879
CA
75
VARIABLE GAIN
CABLE DRIVER
AMPLIFIER
CA_EN
CA_DATA
CA_CLK
DAC
02773-019
Figure 19. Cable Amplifier Connection
CA_EN
CA_CLK
CA_DATA
MSB
8
tMCLK
8
tMCLK
8
tMCLK
4
tMCLK
4
tMCLK
LSB
02773-020
Figure 20. Cable Amplifier Interface Timing
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| AD9879-EB | 制造商:Analog Devices 功能描述:Evaluation Board For Mixed Signal Front End Set Top Box, Cable Modem 制造商:Analog Devices 功能描述:DEV TOOLS, MIXED SGNL FRONT END SET TOP , CBL MODEM - Bulk |
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| AD9880/PCBZ | 功能描述:KIT EVALUATION AD9880 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:Advantiv® 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
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