參數(shù)資料
型號： AD9879BSZ
廠商： Analog Devices Inc
文件頁數(shù)： 11/32頁
文件大小： 0K
描述： IC PROCESSOR FRONT END 100MQFP
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 12
通道數(shù)： 5
功率（瓦特）： 587mW
電壓 - 電源，模擬： 3.3V
電壓 - 電源，數(shù)字： 3.3V
封裝/外殼： 100-BQFP
供應(yīng)商設(shè)備封裝： 100-MQFP（14x20）
包裝： 托盤
AD9879
Rev. A | Page 19 of 32
Bit 5: Tx Path Select Profile 1
The AD9879 quadrature digital upconverter is capable of
storing two preconfigured modulation modes called profiles.
Each profile defines a transmit frequency tuning word and cable
driver amplifier gain (DAC gain) setting. The profile select bit
or PROFILE pin programs the current register profile to be
used. The profile select bit should always be 0 if the PROFILE
pin is to be used to switch between profiles. Using the profile
select bit as a means of switching between different profiles
requires the PROFILE pin to be tied low.
REGISTERS 0x10–0x17—CARRIER FREQUENCY
TUNING
Tx Path Frequency Tuning Words
The frequency tuning word (FTW) determines the DDS-
generated carrier frequency (fC) and is formed via a
concatenation of register addresses.
The 26-bit FTW is spread over four register addresses. Bit 25 is
the MSB and Bit 0 is the LSB.
The carrier frequency equation is given as
fc = [FTW × fSYSCLK]/226
(12)
where:
fSYSCLK = M × fOSCIN.
FTW < 0 × 2000000.
Changes to FTW bytes take effect immediately.
Cable Driver Gain Control
The AD9879 has a 3-pin interface to the AD832x family of
programmable gain cable driver amplifiers. This allows direct
control of the cable driver’s gain through the AD9879.
In its default mode, the complete 8-bit register value is
transmitted over the 3-wire cable amplifier (CA) interface.
If Bit 3 of Register 0x0F is set high, Bits [7:4] determine the
8-bit word sent over the CA interface according to Table 7.
Table 7. Cable Driver Gain Control
Bits [7:4]
CA Interface Transmit Word
0000
0000 0000 (default)
0001
0000 0001
...
0111
0100 0000
1000
1000 0000
In this mode, the lower bits determine the fine gain setting of
the DAC output.
Table 8. DAC Output Fine Gain Setting
Bits [3:0]
DAC Fine Gain
0000
0.0 dB (default)
0001
0.5 dB
...
1110
7.0 dB
1111
7.5 dB
New data is automatically sent over the 3-wire CA interface
(and DAC gain adjust) whenever the value of the active gain
control register changes or a new profile is selected. The default
value is 0x00 (lowest gain).
The formula for the combined output level calculation of the
AD9879 fine gain and AD8327 or AD8322 coarse gain is
V8327 = V9879(0) + (fine)/2 + 6(coarse) 19
(13)
V8322 = V9879(0) + (fine)/2 + 6(coarse) 14
(14)
where:
fine is the decimal value of Bits [3:0].
coarse is the decimal value of Bits [7:8].
V9879(0) is level at AD9879 output in dBmV for fine = 0.
V8327 is level at output of AD8327 in dBmV.
V8322 is level at output of AD8322 in dBmV.
相關(guān)PDF資料
PDF描述
AD9901KQ IC PHASE/FREQ DISCRIMR 14-CDIP
AD9920ABBCZRL IC PROCESSOR CCD 12BIT 105CSPBGA
AD9978BCPZRL IC PROCESSOR CCD 14BIT 40-LFCSP
ADADC71KD IC ADC 16BIT HIGH RES 32-CDIP
ADADC80-Z-12 IC ADC 12BIT INTEGRATED 32-CDIP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9879BSZKL1 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:
AD9879-EB 制造商:Analog Devices 功能描述:Evaluation Board For Mixed Signal Front End Set Top Box, Cable Modem 制造商:Analog Devices 功能描述:DEV TOOLS, MIXED SGNL FRONT END SET TOP , CBL MODEM - Bulk
AD9880 制造商:Analog Devices 功能描述:AUDIO PROCESSOR - Bulk
AD9880/PCB 制造商:AD 制造商全稱:Analog Devices 功能描述:Analog/HDMI Dual Display Interface
AD9880/PCBZ 功能描述:KIT EVALUATION AD9880 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:Advantiv® 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*