![](http://datasheet.mmic.net.cn/Analog-Devices-Inc/AD7765BRUZ-REEL7_datasheet_100439/AD7765BRUZ-REEL7_6.png)
AD7765
Rev. A | Page 5 of 32
Parameter
Test Conditions/Comments
Specification
Unit
Normal Power Mode
AIDD1 (Modulator)
19
mA typ
MCLK = 40 MHz
13
mA typ
AIDD3 (Differential Amplifier)
AVDD3 = 5 V
10
mA typ
AIDD4 (Reference Buffer)
AVDD4 = 5 V
9
mA typ
MCLK = 40 MHz
37
mA typ
Low Power Mode
AIDD1 (Modulator)
10
mA typ
MCLK = 40 MHz
7
mA typ
AIDD3 (Differential Amplifier)
AVDD3 = 5 V
5.5
mA typ
AIDD4 (Reference Buffer)
AVDD4 = 5 V
5
mA typ
MCLK = 40 MHz
20
mA typ
POWER DISSIPATION
Normal Power Mode
MCLK = 40 MHz, decimate 128×
300
mW typ
371
mW max
Low Power Mode
MCLK = 40 MHz, decimate 128×
160
mW typ
215
mW max
PWRDWN
1
held logic low
mW typ
1
2
SNR specifications in decibels are referred to a full-scale input, FS. Tested with an input signal at 0.5 dB below full scale, unless otherwise specified.
3
Output data rate (ODR) = [(MCLK/2)]/decimation rate. That is, the maximum ODR for AD7765 = [(40 MHz/2)/128] = 156.25 kHz.
4
Tested with a 400 A load current.
5
Tested at MCLK = 40 MHz. This current scales linearly with the MCLK frequency applied.
6
Tested at 125°C.