參數(shù)資料
型號: AD7265
廠商: Analog Devices, Inc.
英文描述: Differential Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR ADC
中文描述: 差分輸入,雙1 MSPS的12位,3通道SAR型ADC
文件頁數(shù): 9/16頁
文件大小: 706K
代理商: AD7265
Preliminary Technical Data
AD7265
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa ± nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation distortion terms are those
for which neither m nor n are equal to zero. For example, the
second order terms include (fa + fb) and (fa – fb), while the
third order terms include (2fa + fb), (2fa – fb), (fa + 2fb) and (fa
– 2fb).
The AD7265 is tested using the CCIF standard where two input
frequencies near the top end of the input bandwidth are used.
In this case, the second order terms are usually distanced in
frequency from the original sine waves while the third order
terms are usually at a frequency close to the input frequencies.
As a result, the second and third order terms are specified
separately. The calculation of the intermodulation distortion is
as per the THD specification where it is the ratio of the rms
sum of the individual distortion products to the rms amplitude
of the sum of the fundamentals expressed in dBs.
PSR (Power Supply Rejection)
Variations in power supply will affect the full-scale transition
but not the converter’s linearity. Power supply rejection is the
maximum change in full-scale transition point due to a change
in power supply voltage from the nominal value. See Typical
Performance Curves.
Rev. PrA | Page 9 of 16
相關(guān)PDF資料
PDF描述
AD7265ACP Low-Jitter, Precision Clock Generator with Four Outputs
AD7265ASU Differential Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR ADC
AD7265BCP Low-Jitter, Precision Clock Generator with Three Outputs
AD7265BSU Differential Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR ADC
AD73360(中文) Six-Input Channel Analog Front End(通用6通道模擬輸入前端)
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