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| 型號： | AD5233BRUZ50-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 17/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL POT QUAD 64POS 24-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 接片： | 64 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 4 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 600 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | 4 線 SPI（芯片選擇） |
| 電源電壓： | 2.7 V ~ 5.5 V，±2.25 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 帶卷 (TR) |
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AD5233
Rev. B | Page 24 of 32
BIPOLAR PROGRAMMABLE GAIN AMPLIFIER
There are several ways to achieve bipolar gain. Figure 50 shows
one versatile implementation. Digital potentiometer, U1, sets
the adjustment range; therefore, the wiper voltage, VW2, can be
programmed between Vi and KVi at a given U2 setting.
V+
V–
OP2177
VO
V+
V–
OP2177
AD5233
Vi
A1
W1
B1
–KVi
A2
B2
W2
VDD
VSS
R1
R2
VDD
VSS
A1
U2
A2
U1
C
027
94
-05
1
Figure 50. Bipolar Programmable Gain Amplifier
Configuring A2 as a noninverting amplifier yields a linear
transfer function:
+
×
+
=
K
D2
R1
R2
V
i
O
)
1
(
64
1
(4)
where:
K is the ratio of RWB/RWA that is set by U1.
D is the decimal equivalent of the input code.
In the simpler (and much more usual) case where K is 1, a
pair of matched resistors can replace U1. Equation 4 can be
simplified to
×
+
=
1
64
2
1
2
D
R1
R2
V
i
O
(5)
Table 19 shows the result of adjusting D with A2 configured as a
unity gain, a gain of 2, and a gain of 10. The result is a bipolar
amplifier with linearly programmable gain and 64-step resolution.
Table 19. Result of Bipolar Gain Amplifier
D
R1 = ∞, R2 = 0
R1 = R2
R2 = 9 × R1
0
1
2
10
16
0.5
1
5
32
0
48
0.5
1
5
63
0.968
1.937
9.680
PROGRAMMABLE LOW-PASS FILTER
The AD5233 digital potentiometer can be used to construct a
second-order Sallen-Key low-pass filter, as shown in Figure 51.
A
B
Vi
AD8601
+2.5V
VO
GANGED
TOGETHER
–2.5V
V+
V–
W
R
R2
R1
A
B
W
R
C1
C2
U1
0
27
94
-052
Figure 51. Sallen-Key Low-Pass Filter
The design equations are
2
O
i
O
S
Q
S
V
ω
+
ω
+
ω
=
(6)
C2
C1
R2
R1
O
×
=
ω
1
(7)
C2
R2
1
C1
R1
Q
×
+
×
=
1
(8)
where:
Q is the Q factor.
VO is the resonant frequency.
R1 and R2 are RWB1 and RWB2, respectively.
To achieve maximal flat bandwidth where Q is 0.707, let C1
be twice the size of C2 and let R1 equal R2. Users can first
select convenient values for the capacitors and then gang and
move R1 and R2 together to adjust the 3 dB corner frequency.
Instruction 5, Instruction 7, Instruction 13, and Instruction 15
of the AD5233 make these changes simple to implement.
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