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參數(shù)資料
| 型號(hào)： | AD1954YSTZ |
| 廠(chǎng)商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 6/36頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC AUDIO 3CHAN 26BIT 48LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | SigmaDSP® |
| 位數(shù)： | 26 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 3 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 510mW |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 托盤(pán) |
| 輸出數(shù)目和類(lèi)型： | 6 電壓，單極 |
| 采樣率（每秒）： | 48k |
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AD1954
–14–
b0
IN
OUT
b1
b2
a1
a2
Z–1
Figure 5. Biquad Filter
This section implements the transfer function:
H Z
b
Z
b
Z
a
Z – a
Z
( ) =
+
×
+
×
(
)
×
(
)
0
1
–1
–2
–1
–2
2
The coefficients a1, a2, b0, b1, and b2 are all in twos comple-
ment 2.20 format with a range from –2 to +2 (minus 1 LSB).
The negative sign on the a1 and a2 coefficients is the result of
adding both the feed-forward b terms as well as the feedback a
terms. Some digital filter packages automatically produce the
correct a1 and a2 coefficients for the topology of Figure 5, while
others assume a denominator of the form 1 + a1 × Z–1 + a2
× Z–1. In this case, it may be necessary to invert the a1 and a2
terms for proper operation.
The biquad structure shown in Figure 5 is coded using double-
precision math to avoid limit cycles from occurring when low
frequency filters are used.The coefficients are programmed
by writing to the appropriate location in the parameter RAM,
through the SPI port (see Table VI).There are two possible sce-
narios for controlling the biquad filters:
1. Dynamic Adjustment (e.g., Bass/Treble Control or Parametric
Equalizer).
When using dynamic filter adjustment, it is highly recom-
mended that the user employ the safeload mechanism to avoid
temporary instability when the filters are dynamically updated.
This could occur if some, but not all, of the coefficients were
updated to new values when the DSP calculates the filter
output.The operation of the safeload registers is detailed in
the Options for Parameter Updates section.
2. Setting Static EQ Curve after Power-Up.
If many of the biquad filters need to be initialized after power-
up (e.g., to implement a static speaker correction curve), the
recommended procedure is to set the processor shutdown bit,
wait for the volume to ramp down (about 20 ms), and then
write directly to the parameter RAM in burst mode. After the
RAM is loaded, the shutdown bit can be de-asserted, causing
the volume to ramp back up to the initial value.This entire proce-
dure is click-free and faster than using the safeload mechanism.
The data paths of the AD1954 contain an extra two bits on top of
the 24 bits that are input to the serial port.This allows up to 12 dB
of boost without clipping. However, it is important to remember
that it is possible to design a filter that has less than 12 dB of gain
at the final filter output, but more than 12 dB of gain at the output
of one or more intermediate biquad filter sections. For this reason,
it is important to cascade the filter sections in the correct order,
putting the sections with the largest peak gains at the end of the
chain rather than at the beginning.This is standard practice when
coding IIR filters and is covered in basic books on DSP coding.
If gains larger than 12 dB cannot be avoided, then the coefficients
b0 through b2 of the first biquad section may be scaled down
to fit the signal into the 12 dB maximum signal range and then
scaled back up at the end of the filter chain.
Volume
Three separate SPI registers are used to control the volume—one
each for the left, right, and sub channels.These registers are
special in that they include automatic digital ramp circuitry for
clickless volume adjustment.The volume control word is in 2.20
format and therefore gains from +2.0 to –2.0 are possible.The
default value is 1.0. It takes 1024 audio frames to adjust the vol-
ume from 2.0 down to 0; in the normal case where the maximum
volume is set to 1.0, it will take 512 audio frames for this ramp to
reach zero. Note that a mute command is the same as setting the
volume to zero, except that when the part is unmuted, the vol-
ume returns to its original value.
These volume ramp times assume that the AD1954 is set for
the fast volume ramp speed. If the slow setting is selected, it will
take 8192 audio frames to reach zero from a setting of 2.0. Cor-
respondingly, it will take 4096 frames to reach 0 volume from the
normal setting of 1.0.
The volume blocks are placed after the biquad filter sections to
maximize the level of the signal that is passed through the filter
sections. In a typical situation, the nominal volume setting might
be –15 dB, allowing a substantial increase in volume when the user
increases the volume.The AD1954 was designed with an analog
dynamic range of >112 dB, so that in the typical situation with
the volume set to –15 dB, the signal-to-noise ratio at the output
will still exceed 97 dB. Greater output dynamic ranges are pos-
sible if the compressor/limiter is used, since the post-compression
gain parameter can boost the signal back up to a higher level. In
this case, the compressor will prevent the output from clipping
when the volume is turned up and the input signal is large.
Stereo Image Expander
The image enhancement processing is based on ADI’s patented
Phat Stereo algorithm.The block diagram is shown in Figure 6.
1kHz
FIRST ORDER LPF
LEVEL
LEFT IN
RIGHT IN
LEFT OUT
RIGHT OUT
+
–
Figure 6. Stereo Image Expander
The algorithm works by increasing the phase shift for low frequency
signals that are panned left or right in the stereo mix. Since the ear
is responsive to interaural phase shifts below 1 kHz, this increase in
phase shifts results in a widening of the stereo image. Note that
signals panned to the center are not processed, resulting in a more
natural sound.There are two parameters that control the Phat
Stereo algorithm: the level variable, which controls how much out-
of-phase information is added to the left and right channels, and
the cutoff frequency of the first order low-pass filter, which deter-
mines the frequency range of the added out-of-phase signals. For
best results, the cutoff frequency should be in the range of 500 Hz
to 2 kHz.These parameters are controlled by altering the param-
eter RAM locations that store the parameters spread_level and
alpha_spread.The spread_level is a linear number in 2.20 format
that multiplies the processed left-right signal before it is added to or
subtracted from the main channels.The parameter alpha_spread
REV. A
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| AD1954YSTZRL | 功能描述:IC DAC AUDIO 3CHAN 26BIT 48LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:SigmaDSP® 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類(lèi)型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
| AD1954YSZ | 制造商:Analog Devices 功能描述:DAC 3-CH Delta-Sigma 24-bit 44-Pin MQFP |
| AD1955 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:High Performance Multibit DAC with SACD Playback |
| AD1955ARS | 制造商:Rochester Electronics LLC 功能描述:24 BIT 192KHZ DAC 123 DB DNR WITH SACD - Bulk 制造商:Analog Devices 功能描述:IC DAC 24-BIT |
| AD1955ARSRL | 制造商:Analog Devices 功能描述:DAC 2-CH Delta-Sigma 24-bit 28-Pin SSOP T/R 制造商:Rochester Electronics LLC 功能描述:24 BIT 192KHZ DAC 123 DB DNR WITH SACD - Bulk |
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