參數(shù)資料
型號: AD1954YSTZ
廠商: Analog Devices Inc
文件頁數(shù): 13/36頁
文件大?。?/td> 0K
描述: IC DAC AUDIO 3CHAN 26BIT 48LQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1
系列: SigmaDSP®
位數(shù): 26
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 3
電壓電源: 模擬和數(shù)字
功率耗散(最大): 510mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
輸出數(shù)目和類型: 6 電壓,單極
采樣率(每秒): 48k
AD1954
–20–
Table II. SPI Port Address Decoding
SPI Address
Register Name
Read/Write Word Length
0–255
Parameter RAM
Write: 22 Bits
Read: 22 Bits
256
SPI Control Register 1
Write: 11 Bits
Read: 2 Bits
257
SPI Control Register 2
Write: 9 Bits
Read: N/A
258
Volume Left
Write: 22 Bits
Read: N/A
259
Volume Right
Write: 22 Bits
Read: N/A
260
Volume Sub
Write: 22 Bits
Read: N/A
261
Data Capture (SPI Out) #1
Write: 9-Bit Program Counter Value, 2-Bit Register Address
Read: 24 Bits
262
Data Capture (SPI Out) #2
Write: 9-Bit Program Counter Value, 2-Bit Register Address
Read: 24 Bits
263
Data Capture (Serial Out) Left
Write: 9-Bit Program Counter Value, 2-Bit Register Address
Read: N/A
264
Data Capture (Serial Out) Right
Write: 9-Bit Program Counter Value, 2-Bit Register Address
Read: N/A
265
Parameter RAM Safe Load Register 0
Write: 8-Bit Parameter RAM Address, 22-Bit Parameter Data
Read: N/A
266
Parameter RAM Safe Load Register 1
Write: 8-Bit Parameter RAM Address, 22-Bit Parameter Data
Read: N/A
267
Parameter RAM Safe Load Register 2
Write: 8-Bit Parameter RAM Address, 22-Bit Parameter Data
Read: N/A
268
Parameter RAM Safe Load Register 3
Write: 8-Bit Parameter RAM Address, 22-Bit Parameter Data
Read: N/A
269
Parameter RAM Safe Load Register 4
Write: 8-Bit Parameter RAM Address, 22-Bit Parameter Data
Read: N/A
270–510
Unused
511
Test Register
Write: 8 Bits
Read: N/A
512–1024
Program RAM
Write: 35 Bits
Read: 35 Bits
SPI Address Decoding
Table II shows the address decoding used in the SPI port.The
SPI address space encompasses a set a registers and two RAMs,
one for holding signal processing parameters and one for hold-
ing the program instructions. Both of the RAMs are loaded on
power-up from on-board boot ROMs.
Control Register 1
Control Register 1 is an 11-bit register that controls data capture,
serial modes, de-emphasis, mute, power-down, and SPI-to-
memory transfers.Table III documents the contents of this register.
Table IV details the two bits in the register’s read operation.
Bits 1:0 set the word length, which is used in right-justified serial
modes to determine where the MSB is located relative to the start
of the audio frame.
Bits 3:2 select one of four serial modes, which are discussed in
the Serial Data Input Port section.
The de-emphasis curve selection Bits 5:4 turn on the internal
de-emphasis filter for one of three possible sample rates.
Bit 6, the soft power-down bit, stops the internal clocks to the DSP
core, but does not reset the part.The digital power consumption
is reduced to a low level when this bit is asserted. Reset can only
be asserted using the external reset pin.
Soft mute (Bit 7) is used to initiate a volume ramp-down sequence.
If the initial volume was set to 1.0, this operation will take 512
audio frames to complete.When this bit is de-asserted, a ramp-up
sequence is initiated until the volume returns to its original setting.
When set, Bit 8 enables the DCSOUT pin.This must be set in
order to read from the data capture serial out registers.
REV. A
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AD1954YSTZRL 功能描述:IC DAC AUDIO 3CHAN 26BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:SigmaDSP® 標準包裝:47 系列:- 設(shè)置時間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散(最大):55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP(0.209",5.30mm 寬) 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流,單極;1 電流,雙極 采樣率(每秒):*
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