參數(shù)資料
型號(hào): AD1954YSTZ
廠商: Analog Devices Inc
文件頁數(shù): 20/36頁
文件大?。?/td> 0K
描述: IC DAC AUDIO 3CHAN 26BIT 48LQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
系列: SigmaDSP®
位數(shù): 26
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 3
電壓電源: 模擬和數(shù)字
功率耗散(最大): 510mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
輸出數(shù)目和類型: 6 電壓,單極
采樣率(每秒): 48k
AD1954
–27–
The format of the captured data varies according to the register
select fields. Data captured from the mult_out setting is in 1.23
twos complement format so that a full-scale input signal will
produce a full-scale digital output (assuming no processing). If
the parameters are set such that the input-to-output gain is more
than 0 dB, then the digital output will be clipped.
Data captured from the DB_OUT setting is in 5.19 format, where
DB_OUT
the actual rms dB level is equal to –87 + (3 DB_OUT). In this
DB_OUT
equation, DB_OUT is the value that is captured. It follows that in
DB_OUT
this data format, the actual output readings will range from –87 dB
to +9 dB.The AD1954 uses the convention that 0 dB is the rms
value of the full-scale digital signal.
Data captured using the MDI setting is in 3.21 format. A 0 dB
digital input will produce a –12 dB digital output, assuming the
AD1954 is set for no processing.
Data captured using the MCI setting is in 2.20 format.This data
is generally a signal gain or filter coefficient, and therefore it does
not make sense to talk about the input-to-output gain. A coeffi-
cient of 01000000000000000000 corresponds to a gain of 1.0.
The data that must be written to set up the data capture is a
concatenation of the 9-bit program count index with the 2-bit
register select field. Refer to Table XX to find the capture count
and register select numbers that correspond to the desired point
to be monitored in the default signal processing flow.
The SPI capture registers can be accessed by reading from SPI
Locations 261 (for SPI Capture Register 1) or 262 (for SPI Cap-
ture Register 2).The other two data capture registers (data capture
serial out) automatically transfer their data to the data capture
serial out (DCSOUT) pin. DCSOUT Capture Register 1 is pres-
ent in the left data slot (as defined by the serial input format), and
DCSOUT Capture Register 2 is present in the right data slot.The
format for writing to the SPI data capture setup registers is given
in the SPI section of this data sheet.
DCSOUT
LRCLK
BCLK
dB LEVEL METERS
MICRO-
CONTROLLER
AD1954
EXT DACs
5.1
CHANNEL
OUTPUT
Figure 19. Typical Application of Data Capture Feature
REV. A
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參數(shù)描述
AD1954YSTZRL 功能描述:IC DAC AUDIO 3CHAN 26BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:SigmaDSP® 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散(最大):55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP(0.209",5.30mm 寬) 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流,單極;1 電流,雙極 采樣率(每秒):*
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