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參數(shù)資料
| 型號： | AD14160L |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Quad-SHARC DSP Multiprocessor Family |
| 中文描述： | 四SHARC處理器DSP的多處理器家族 |
| 文件頁數(shù)： | 40/52頁 |
| 文件大小： | 1193K |
| 代理商： | AD14160L |
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AD14160/AD14160L
–40–
REV. A
ASSEMBLY RECOMMENDATIONS
Socket Information
Standard sockets are available from 3M and Plastronics. The
3M socket used is the BGA III style. The customer must specify
how they want the socket populated with pins and a slight modifi-
cation is required to compensate for the tolerance of the package
thickness.
PCB Board Layout
A classical dog bone style pad should be used. A solder pad
diameter of 0.65 mm is recommended. The pad should be non-
soldermask defined.
NON-SOLDERMASK
DEFINED PAD
SOLDERMASK
Figure 37.
Solder Paste Printing
A solder paste print of 0.7 mm diameter with thickness of 0.15
to 0.2 mm is recommended. Normal solder paste alloy can be
used, i.e., 60/40, 63/37, etc.
Reflow Profile
The profile shown below is recommended.
220
200
160
150
100
T
8
C
100
50
6
10
8
C/MIN
150
8
C
TIME – Sec
120
6
30 SEC
150
z
160
8
C
60
6
10 SEC
OVER 200
8
C
160
50
6
10
8
C/MIN
200
8
C
200
–40
6
10
8
C/MIN
170
8
C
BGA
PCB
MEASUREMENT POINT
PEAK 220
6
10
8
C
Figure 38.
Signal Pad Assignment Topology
The AD14160/AD14160L signal pad assignments were care-
fully analyzed for improved board routing and maximum reliabil-
ity. By restricting the required 432 I/O to the inner 25 mm circle,
TCE mismatch concerns are minimized. (BGA ball patterns of
25 mm size are well characterized and documented.) The signal
I/O is carefully placed and grouped to minimize pin escape
difficulties in routing. Redundant power/ground contact pads are
also provided (but not required) to improve the thermal perfor-
mance and the ground bounce performance of the package (see
Figure 42).
DENSITY IMPROVEMENTS
In addition to careful considerations to performance characteris-
tics such as ground bounce, signal quality, and noise isolation,
the AD14160/AD14160L also provides significant density ad-
vantages.
Board Area Reduction
The minimally packaged AD14160/AD14160L CBGA reduces
required board area by approximately 75%.
PIN ONE
QUAD SHARC
BGA MCM
DISCRETE
SHARC
DISCRETE
SHARC
DISCRETE
SHARC
1.850 IN SQ
3
Figure 39.
Embedded Wiring
Forty feet of optimized routing is embedded in four integrated
signal routing layers (in addition to power and ground planes).
This eliminated hundreds of feet of multiprocessing intercon-
nect on the target PCB; thereby, also reducing board cost and
required routing layers.
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