參數(shù)資料
型號: AD14160L
廠商: Analog Devices, Inc.
英文描述: Quad-SHARC DSP Multiprocessor Family
中文描述: 四SHARC處理器DSP的多處理器家族
文件頁數(shù): 29/52頁
文件大小: 1193K
代理商: AD14160L
AD14160/AD14160L
–29–
REV. A
CLKIN
t
SDRLC
DMAR
x
DATA (FROM
ADSP-2106x TO
EXTERNAL DRIVE)
DATA (FROM
EXTERNAL DRIVE
TO ADSP-2106x)
RD
WR
t
WDR
t
SDRHC
t
DMARH
t
DMARLL
t
HDGC
t
WDGH
t
DDGL
t
WDGL
DMAG
x
t
VDATDGH
t
DATDRH
t
DATRDGH
t
HDATIDG
t
DGWRL
t
DGWRH
t
DGWRR
t
DGRDL
t
DRDGH
t
DADGH
t
DGRDR
t
SDATDGL
*
“MEMORY READ – BUS MASTER,” “MEMORY WRITE – BUS MASTER,” AND “SYNCHRONOUS READ/WRITE – BUS MASTER”
TIMING SPECIFICATIONS FOR ADDR
31–0
,
RD
,
WR
,
SW
,
MS
3-0
AND ACK ALSO APPLY HERE.
(EXTERNAL DEVICE
TO EXTERNAL
MEMORY)
(EXTERNAL
MEMORY TO
EXTERNAL DEVICE)
TRANSFERS BETWEEN ADSP-2106x INTERNAL MEMORY AND EXTERNAL DEVICE
TRANSFERS BETWEEN EXTERNAL DEVICE AND EXTERNAL MEMORY* (EXTERNAL HANDSHAKE MODE)
t
DDGHA
ADDRESS
MS
X
,
SW
Figure 21. DMA Handshake Timing
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