參數(shù)資料
型號(hào): AD14160BB-4
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號(hào)處理
英文描述: Quad-SHARC DSP Multiprocessor Family
中文描述: 48-BIT, 40 MHz, OTHER DSP, CBGA452
封裝: CERAMIC, BGA-452
文件頁數(shù): 13/52頁
文件大?。?/td> 1193K
代理商: AD14160BB-4
AD14160/AD14160L
–13–
REV. A
SYSTEM
CLKIN
EMU
5k
V
*
TDI
TDO
5k
V
*
TDI
EMU
TMS
TRST
TCK
TDO
CLKIN
*
OPEN DRAIN DRIVER OR EQUIVALENT, i.e.,
TDI
TDO
TDI
TDO
TDI
TDO
TDI
TDO
TDI
TDO
Figure 8. JTAG Clocktree for Multiple ADSP-2106x Systems
Connecting CLKIN to Pin 4 of the EZ-ICE header is optional.
The emulator only uses CLKIN when directed to perform op-
erations such as starting, stopping and single-stepping multiple
ADSP-2106xs in a synchronous manner. If you do not need
these operations to occur synchronously on the multiple proces-
sors, simply tie Pin 4 of the EZ-ICE header to ground.
If synchronous multiprocessor operations are needed and
CLKIN is connected, clock skew between the AD14160/
AD14160L and the CLKIN pin on the EZ-ICE header must be
minimal. If the skew is too large, synchronous operations may
be off by one cycle between processors. For synchronous multi-
processor operation TCK, TMS, CLKIN and
EMU
should be
treated as critical signals in terms of skew, and should be laid
out as short as possible on your board. If TCK, TMS and
CLKIN are driving a large number of ADSP-2106xs (more than
eight) in your system, then treat them as a “clock tree” using
multiple drivers to minimize skew. (See Figure 8 JTAG Clock
Tree and Clock Distribution in the “High Frequency Design
Considerations” section of the
ADSP-2106x User’s Manual).
If synchronous multiprocessor operations are not needed (i.e.,
CLKIN is not connected), just use appropriate parallel termina-
tion on TCK and TMS. TDI, TDO,
EMU
and
TRST
are not
critical signals in terms of skew.
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