參數(shù)資料
型號(hào)： A81L801TG-70IF
廠商： AMIC Technology Corporation
英文描述： Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
中文描述： 堆疊式多芯片封裝（MCP）1的MX 8位/ 16位為512k ×引導(dǎo)扇區(qū)閃存和128K × 8 SRAM的低電壓的CMOS
文件頁(yè)數(shù)： 40/47頁(yè)
文件大?。?/td> 705K
代理商： A81L801TG-70IF
A81L801
PRELIMINARY (March, 2005, Version 0.0)
39
AMIC Technology, Corp.
Capacitance (T
A
= 25
°
C, f = 1.0MHz)
Symbol
Parameter
Min.
Max.
Unit
Conditions
C
IN
*
Input Capacitance
6
pF
V
IN
= 0V
C
I/O
*
Input/Output Capacitance
8
pF
V
I/O
= 0V
* These parameters are sampled and not 100% tested.
AC Characteristics
(T
A
= -25
°
C to +85
°
C, VCC_S = 2.7V to 3.6V)
Symbol
Parameter
70 ns
Unit
Min.
Max.
Read Cycle
t
RC
Read Cycle Time
70
-
ns
t
AA
Address Access Time
-
70
ns
t
ACE1_S
Chip Enable Access Time
CE_S
-
70
ns
t
OE
Output Enable to Output Valid
-
35
ns
t
CLZ1
Chip Enable to Output in Low Z
CE_S
10
-
ns
t
OLZ
Output Enable to Output in Low Z
5
-
ns
t
CHZ1
Chip Disable to Output in High Z
CE_S
0
25
ns
t
OHZ
Output Disable to Output in High Z
0
25
ns
t
OH
Output Hold from Address Change
10
-
ns
Write Cycle
t
WC
Write Cycle Time
70
-
ns
t
CW
Chip Enable to End of Write
60
-
ns
t
AS
Address Setup Time
0
-
ns
t
AW
Address Valid to End of Write
60
-
ns
t
WP
Write Pulse Width
50
-
ns
t
WR
Write Recovery Time
0
-
ns
t
WHZ
Write to Output in High Z
0
25
ns
t
DW
Data to Write Time Overlap
30
-
ns
t
DH
Data Hold from Write Time
0
-
ns
t
OW
Output Active from End of Write
5
-
ns
Notes: t
CHZ1
, t
OHZ
, and t
WHZ
are defined as the time at which the outputs achieve the open circuit condition and are
not referred to output voltage levels.
相關(guān)PDF資料
PDF描述
A81L801UG-70 Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70F Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70I Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70IF Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A8205SLH-XX LOW-DROPOUT REGULATORS - HIGH EFFICIENCY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A81L801UG-70 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70F 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70I 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70IF 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A-81X 制造商:Triad Magnetics 功能描述:
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