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參數(shù)資料
| 型號： | A81L801TG-70IF |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
| 中文描述： | 堆疊式多芯片封裝（MCP）1的MX 8位/ 16位為512k ×引導扇區(qū)閃存和128K × 8 SRAM的低電壓的CMOS |
| 文件頁數(shù)： | 16/47頁 |
| 文件大?。?/td> | 705K |
| 代理商： | A81L801TG-70IF |
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A81L801
PRELIMINARY (March, 2005, Version 0.0)
15
AMIC Technology, Corp.
Sector Protection/Unprotection
The hardware sector protection feature disables both program
and erase operations in any sector. The hardware sector
unprotection features re-enables both program and erase
operations in previously protected sectors.
It is possible to determine whether a sector is protected or
unprotected. See “Autoselect Mode” for details.
Sector protection / unprotection can be implemented via two
methods. The primary method requires VID on the
RESET
pin
only, and can be implemented either in-system or via
programming equipment. Figure 2 shows the algorithm and the
Sector Protect / Unprotect Timing Diagram illustrates the timing
waveforms for this feature. This method uses standard
microprocessor bus cycle timing. For sector unprotect, all
unprotected sectors must first be protected prior to the first
sector unprotect write cycle. The alternate method must be
implemented using programming equipment. The procedure
requires a high voltage (V
ID
) on address pin A9 and the control
pins.
The device is shipped with all sectors unprotected.
It is possible to determine whether a sector is protected or
unprotected. See "Autoselect Mode" for details.
Hardware Data Protection
The requirement of command unlocking sequence for
programming or erasing provides data protection against
inadvertent writes (refer to the Command Definitions table). In
addition, the following hardware data protection measures
prevent accidental erasure or programming, which might
otherwise be caused by spurious system level signals during
V
CC
power-up transitions, or from system noise. The device is
powered up to read array data to avoid accidentally writing
data to the array.
Write Pulse "Glitch" Protection
Noise pulses of less than 5ns (typical) on
OE
,
CE_F
or
WE
do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of
OE
=V
IL
,
CE_F
= V
IH
or
WE
= V
IH
. To initiate a write cycle,
CE_F
and
WE
must be a logical zero while
OE
is a logical one.
Power-Up Write Inhibit
If
WE
=
CE_F
= V
IL
and
OE
= V
IH
during power up, the
device does not accept commands on the rising edge of
WE
.
The internal state machine is automatically reset to reading
array data on the initial power-up.
Temporary Sector Unprotect
This feature allows temporary unprotection of previous
protected sectors to change data in-system. The Sector
Unprotect mode is activated by setting the
RESET
pin to V
ID
.
During this mode, formerly protected sectors can be
programmed or erased by selecting the sector addresses.
Once V
ID
is removed from the
RESET
pin, all the previously
protected sectors are protected again. Figure 1 shows the
algorithm, and the Temporary Sector Unprotect diagram shows
the timing waveforms, for this feature.
START
RESET = V
ID
(Note 1)
Perform Erase or
Program Operations
RESET = V
IH
Temporary Sector
Unprotect
Completed (Note 2)
Notes:
1. All protected sectors unprotected.
2. All previously protected sectors are protected once again.
Figure 1. Temporary Sector Unprotect Operation
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| A81L801UG-70 | Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
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| A81L801UG-70I | Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
| A81L801UG-70IF | Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| A81L801UG-70 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
| A81L801UG-70F | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
| A81L801UG-70I | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
| A81L801UG-70IF | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
| A-81X | 制造商:Triad Magnetics 功能描述: |
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