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參數(shù)資料
| 型號： | A81L801TG-70IF |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
| 中文描述： | 堆疊式多芯片封裝（MCP）1的MX 8位/ 16位為512k ×引導(dǎo)扇區(qū)閃存和128K × 8 SRAM的低電壓的CMOS |
| 文件頁數(shù)： | 13/47頁 |
| 文件大?。?/td> | 705K |
| 代理商： | A81L801TG-70IF |
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A81L801
PRELIMINARY (March, 2005, Version 0.0)
12
AMIC Technology, Corp.
The
RESET
pin may be tied to the system reset circuitry. A
system reset would thus also reset the Flash memory, enabling
the system to read the boot-up firmware from the Flash
memory.
If
RESET
is asserted during a program or erase operation,
the RY/
BY
pin remains a “0” (busy) until the internal reset
operation is complete, which requires a time t
READY
(during
Embedded Algorithms). The system can thus monitor RY/
BY
to determine whether the reset operation is complete. If
RESET
is asserted when a program or erase operation is not
executing (RY/
BY
pin is “1”), the reset operation is completed
within a time of t
READY
(not during Embedded Algorithms). The
system can read data t
RH
after the
RESET
pin return to V
IH
.
Refer to the AC Characteristics tables for
RESET
parameters
and diagram.
Table 2. A81L801 Top Boot Block Sector Address Table
Address Range (in hexadecimal)
Sector
A18
A17
A16
A15
A14
A13
A12
Sector Size
(Kbytes/
Kwords)
Byte Mode (x 8)
Word Mode (x16)
SA0
0
0
0
0
X
X
X
64/32
00000h - 0FFFFh
00000h - 07FFFh
SA1
0
0
0
1
X
X
X
64/32
10000h - 1FFFFh
08000h - 0FFFFh
SA2
0
0
1
0
X
X
X
64/32
20000h - 2FFFFh
10000h - 17FFFh
SA3
0
0
1
1
X
X
X
64/32
30000h - 3FFFFh
18000h - 1FFFFh
SA4
0
1
0
0
X
X
X
64/32
40000h - 4FFFFh
20000h - 27FFFh
SA5
0
1
0
1
X
X
X
64/32
50000h - 5FFFFh
28000h - 2FFFFh
SA6
0
1
1
0
X
X
X
64/32
60000h - 6FFFFh
30000h - 37FFFh
SA7
0
1
1
1
X
X
X
64/32
70000h - 7FFFFh
38000h - 3FFFFh
SA8
1
0
0
0
X
X
X
64/32
80000h - 8FFFFh
40000h - 47FFFh
SA9
1
0
0
1
X
X
X
64/32
90000h - 9FFFFh
48000h - 4FFFFh
SA10
1
0
1
0
X
X
X
64/32
A0000h - AFFFFh
50000h - 57FFFh
SA11
1
0
1
1
X
X
X
64/32
B0000h - BFFFFh
58000h - 5FFFFh
SA12
1
1
0
0
X
X
X
64/32
C0000h - CFFFFh
60000h - 67FFFh
SA13
1
1
0
1
X
X
X
64/32
D0000h - DFFFFh
68000h - 6FFFFh
SA14
1
1
1
0
X
X
X
64/32
E0000h - EFFFFh
70000h - 77FFFh
SA15
1
1
1
1
0
X
X
32/16
F0000h - F7FFFh
78000h - 7BFFFh
SA16
1
1
1
1
1
0
0
8/4
F8000h - F9FFFh
7C000h - 7CFFFh
SA17
1
1
1
1
1
0
1
8/4
FA000h - FBFFFh
7D000h - 7DFFFh
SA18
1
1
1
1
1
1
X
16/8
FC000h - FFFFFh
7E000h - 7FFFFh
Note:
Address range is A18: A
-1
in byte mode and A18: A0 in word mode. See “Word/Byte Configuration” section.
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| A81L801UG-70 | Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A81L801UG-70 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
| A81L801UG-70F | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
| A81L801UG-70I | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
| A81L801UG-70IF | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
| A-81X | 制造商:Triad Magnetics 功能描述: |
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