參數(shù)資料
型號(hào)： A81L801TG-70IF
廠商： AMIC Technology Corporation
英文描述： Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
中文描述： 堆疊式多芯片封裝（MCP）1的MX 8位/ 16位為512k ×引導(dǎo)扇區(qū)閃存和128K × 8 SRAM的低電壓的CMOS
文件頁(yè)數(shù)： 21/47頁(yè)
文件大小： 705K
代理商： A81L801TG-70IF
A81L801
PRELIMINARY (March, 2005, Version 0.0)
20
AMIC Technology, Corp.
Table 5. A81L801 Command Definitions
Bus Cycles (Notes 2 - 5)
Third
Addr Data Addr
555
AAA
555
90
First
Second
Fourth
Fifth
Sixth
Addr
Command
Sequence
(Note 1)
C
Addr Data Addr Data
RA
RD
XXX
F0
555
AAA
555
AA
Data
Addr
Data
Data
Read (Note 6)
1
1
Reset (Note 7)
Word
Byte
Word
Byte
2AA
555
2AA
Manufacturer ID
4
AA
55
90
X00
37
X01
B31A
1A
Device ID,
Top Boot Block
4
AAA
555
55
AAA
X02
Word
555
2AA
555
X01
X02 9B
B39B
Device ID,
Bottom Boot Block
Byte
4
AAA
AA
555
55
AAA
90
Word
555
2AA
555
X03
Continuation ID
Byte
4
AAA
AA
555
55
AAA
90
X06
7F
XX00
XX01
00
01
Word
555
2AA
555
(SA)
X02
A
Sector Protect Verify
(Note 9)
Byte
4
AAA
AA
555
55
AAA
90
(SA)
X04
Word
Byte
Word
Byte 3
555
AAA
555
AAA
XXX A0
XXX 90
555
AAA
555
AAA
XXX
XXX
2AA
555
2AA
555
PA
XXX
2AA
555
2AA
555
555
AAA
555
AAA
555
AAA
555
AAA
Program
4
AA
55
A0
PA
PD
Unlock Bypass
AA
55
20
Unlock Bypass Program (Note 10)
2
PD
00
Unlock Bypass Reset (Note 11)
2
Word
Byte
Word
Byte
555
AAA
555
AAA
2AA
555
2AA
555
555
AAA
Chip Erase
6
AA
55
80
AA
55
10
Sector Erase
6
AA
55
80
AA
55
SA
30
Erase Suspend (Note 12)
1
1
B0
30
Erase Resume (Note 13)
Legend:
X = Don't care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the
WE
or
CE_F
pulse,
whichever happens later.
PD = Data to be programmed at location PA. Data latches on the rising edge of
WE
or
CE_F
pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A18 - A12 select a unique sector.
Note:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Except when reading array or autoselect data, all bus cycles are write operation.
4. Data bits I/O
15
~I/O
8
are don’t care for unlock and command cycles.
5. Address bits A18 - A11 are don't cares for unlock and command cycles, unless SA or PA required.
6. No unlock or command cycles required when reading array data.
7. The Reset command is required to return to reading array data when device is in the autoselect mode, or if I/O
5
goes high (while
the device is providing status data).
8. The fourth cycle of the autoselect command sequence is a read cycle.
9. The data is 00h for an unprotected sector and 01h for a protected sector. See “Autoselect Command Sequence” for more information.
10. The Unlock Bypass command is required prior to the Unlock Bypass Program command.
11. The Unlock Bypass Reset command is required to return to reading array data when the device is in the unlock bypass mode.
12. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode.
13. The Erase Resume command is valid only during the Erase Suspend mode.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A81L801UG-70 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70F 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70I 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70IF 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A-81X 制造商:Triad Magnetics 功能描述:
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