參數(shù)資料
型號(hào)： A81L801TG-70IF
廠商： AMIC Technology Corporation
英文描述： Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
中文描述： 堆疊式多芯片封裝（MCP）1的MX 8位/ 16位為512k ×引導(dǎo)扇區(qū)閃存和128K × 8 SRAM的低電壓的CMOS
文件頁(yè)數(shù)： 24/47頁(yè)
文件大?。?/td> 705K
代理商： A81L801TG-70IF
A81L801
PRELIMINARY (March, 2005, Version 0.0)
23
AMIC Technology, Corp.
I/O
3
: Sector Erase Timer
After writing a sector erase command sequence, the system
may read I/O
3
to determine whether or not an erase operation
has begun. (The sector erase timer does not apply to the chip
erase command.) If additional sectors are selected for erasure,
the entire time-out also applies after each additional sector
erase command. When the time-out is complete, I/O
3
switches
from "0" to "1." The system may ignore I/O
3
if the system can
guarantee that the time between additional sector erase
commands will always be less than 50
μ
s. See also the "Sector
Erase Command Sequence" section.
After the sector erase command sequence is written, the
system should read the status on I/O
7
(
Data
Polling) or I/O
6
(Toggle Bit I) to ensure the device has accepted the command
sequence, and then read I/O
3
. If I/O
3
is "1", the internally
controlled erase cycle has begun; all further commands (other
than Erase Suspend) are ignored until the erase operation is
complete. If I/O
3
is "0", the device will accept additional sector
erase commands. To ensure the command has been
accepted, the system software should check the status of I/O
3
prior to and following each subsequent sector erase
command. If I/O
3
is high on the second status check, the last
command might not have been accepted. Table 6 shows the
outputs for I/O
3
.
START
Read I/O
7
-I/O
0
Toggle Bit
= Toggle
Program/Erase
Operation Not
Commplete, Write
Reset Command
Yes
Notes :
1. Read toggle bit twice to determine whether or not it is
toggling. See text.
2. Recheck toggle bit because it may stop toggling as I/O
5
changes to "1". See text.
No
Read I/O
7
- I/O
0
Twice
I/O
5
= 1
Toggle Bit
= Toggle
Yes
Yes
Program/Erase
Operation Complete
No
No
Read I/O
7
-I/O
0
(Notes 1,2)
Figure 6. Toggle Bit Algorithm
(Note 1)
相關(guān)PDF資料
PDF描述
A81L801UG-70 Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70F Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70I Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70IF Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A81L801UG-70 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70F 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70I 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A81L801UG-70IF 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM
A-81X 制造商:Triad Magnetics 功能描述:
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