參數(shù)資料
型號(hào)： A60Q30-2
廠商： Electronic Theatre Controls, Inc.
元件分類： 保險(xiǎn)絲
英文描述： SEMICONDUCTOR PROTECTION FUSES
中文描述： 半導(dǎo)體保護(hù)保險(xiǎn)絲
文件頁(yè)數(shù)： 13/61頁(yè)
文件大?。?/td> 2024K
代理商： A60Q30-2
BCRTM-13
#1 Status Register (Read Only)
These bits indicate the BCRTM’s current status.
Bit
Number
Description
BIT 15
BIT 14
TEST. This bit reflects the inverse of the TEST output. It changes state simultaneously with the TEST output.
(RT,M) Remote Terminal (or Monitor) Active. Indicates that the BCRTM, in the Remote Terminal (or Monitor)
mode, is presently servicing a command. This bit reflects the inverse of the COMSTR pin.
(RT) Dynamic Bus Control Acceptance. This bit reflects the state of the Dynamic Bus Control
Acceptance bit in the RT status word (see Register 10 on page 16).
(RT) Terminal Flag bit is set in RT status word. This bit reflects the result of writing to Register 10, bit 11
(RT) Service Request bit is set in RT status word.This bit reflects the result of writing to Register 10, bit 10.
(RT) Busy bit is set in RT status word.This bit reflects the result of writing to Register 10, bits 9 or 14.
BIT is in progress.
Reset is in progress. This bit indicates that either a write to Register 12 has just occurred or the BCRTM has
just received a Reset Remote Terminal (#01000) Mode Code. This bit remains set less than 1ms.
BC/(RT) Mode. Indicates the current mode of operation. A reset operation must be performed when changing
between BC and RT modes.
Channel A/B. Indicates either the channel presently in use or the last channel used.
Subsystem Fail Indicator. Indicates receiving a subsystem fail signal from the host subsystem on the
SSYSF input.
Reserved.
(BC) Command Block Execution is in progress. (RT) Remote Terminal is in operation. This bit reflects bit 0 of
Register 0.
#2 Current Command Block Register (BC,M)/Remote Terminal Descriptor Space Address Register (RT)
(BC) This register contains the address of the head pointer of the Command Block being executed. Accessing a new Command
Block updates it.
(RT) The host CPU initializes this register to indicate the starting location of the RT Descriptor Space. The host must allocate
320 sequential locations following this starting address. For proper operation, this location must start on an I x 512 decimal
address boundary, where I is an integer multiple.
(M) This register contains the address of the control/status word of the current Monitor Command Block. Accessing a new
Command Block updates it.
#3 Polling Compare Register
In the polling mode, the CPU sets the Polling Compare Register to indicate the RT response word on which the BCRTM should
interrupt. This register is 11 bits wide, corresponding to bit times 9 through 19 of the RT’s 1553 status word response. The
sync, Remote Terminal Address, and parity bits are not included (see the section on Polling, page 32).
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BITs 4-1
BIT 0
相關(guān)PDF資料
PDF描述
A60Q SEMICONDUCTOR PROTECTION FUSES
A60Q10-2 SEMICONDUCTOR PROTECTION FUSES
A60Q12-2 SEMICONDUCTOR PROTECTION FUSES
A60Q15-2 SEMICONDUCTOR PROTECTION FUSES
A60Q20-2 SEMICONDUCTOR PROTECTION FUSES
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A60Q35-2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SEMICONDUCTOR PROTECTION FUSES
A60Q40-2 制造商:Ferraz Shawmut 功能描述:
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A60Q8-2 制造商:Ferraz Shawmut 功能描述:
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